mc68hc68t1 Freescale Semiconductor, Inc, mc68hc68t1 Datasheet - Page 14

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mc68hc68t1

Manufacturer Part Number
mc68hc68t1
Description
Mc68hc68t1 Real-time Clock Plus Ram With Serial Interface
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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LINE
Line Sense (Pin 11)
functions. The first function utilizes the input signal as the fre-
quency source for the timekeeping counters. This function is
selected by setting the line/XTAL bit high in the clock control
register. The second function enables the LINE input to de-
tect a power failure. Threshold detectors operating above
and below V DD sense an ac voltage loss. The Power Sense
bit in the interrupt control register must be set high, and
crystal or external clock source operation is required. The
line/XTAL bit in the clock control register must be low to
select crystal operation. When Power Sense is enabled, this
pin, left unconnected, floats to V DD .
allows this pin’s voltage to rise above V DD . Care must be
taken in the handling of this device.
V SYS
System Voltage (Pin 12)
pin initiates power–up if it rises 0.7 V above the level at the
V BATT input pin after previously falling below 0.7 V below
V BATT . When power–up is initiated, the PSE pin returns high
and the CLKOUT pin is enabled. The CPUR output pin is
also set high. Conversely, if the level of the V SYS pin falls be-
low V BATT + 0.7 V, the PSE, CLKOUT, and CPUR pins are
placed low. The voltage level present at this pin at the end of
POR determines the device’s operating mode.
V BATT
Battery Voltage (Pin 13)
connected to the positive terminal of the battery. The V BATT
pin always supplies power to the MC68HC68T1, even when
the device is not in the battery–backup mode. To maintain
timekeeping, the V BATT pin must be at least 2.2 V. When the
level on the V SYS pin falls below V BATT + 0.7 V, V BATT is
internally connected to the V DD pin.
the unused V BATT and XTAL pins may be tied to V SS .
Alternatively, if V BATT is connected to V DD , XTAL in can be
tied to either V SS or V DD .
allows this pin’s voltage to rise above V DD . Care must be
taken in the handling of this device.
XTAL in , XTAL out
Crystal Input/Output (Pins 14, 15)
32.768 kHz, 1.048576 MHz, 2.097152 MHz, or 4.194304 MHz
crystal. If crystal operation is not desired and Line Sense is
used as frequency source, connect XTAL in to V DD or V SS
(caution: see V BATT pin description) and leave XTA out open.
If an external clock is used, connect the external clock to
XTAL in and leave XTAL out open. The external clock must
swing from at least 30 to 70% of (V DD – V SS ). Preferably, this
input should swing from V SS to V DD .
MC68HC68T1
14
The LINE sense input can be used to drive one of two
This output has no ESD protection diode tied to V DD which
This input is connected to system voltage. The level on this
This pin is the only oscillator power source and should be
When the LINE input is used as the frequency source,
This output has no ESD protection diode tied to V DD which
For crystal operation, these two pins are connected to a
V DD
Positive Power Supply (Pin 16)
range from 3.0 to 6.0 V with respect to V SS . To maintain time-
keeping, the minimum standby voltage is 2.2 V with respect
to V SS . For proper operation in battery–backup mode, a
diode must be placed in series with V DD .
CLOCK CONTROL REGISTER (READ/WRITE) — READ
ADDRESS $31/WRITE ADDRESS $B1
Start–Stop
clock circuitry. A low holds all bits reset in the divider chain
from 32 Hz to 1 Hz. The clock out signal selected by bits D0,
D1, and D2 is not affected by the stop function except the
1 and 2 Hz outputs.
Line/ XTAL
cycle input present at the LINE input pin. When the bit is low,
the XTAL in pin is the source of the time update.
XTAL Select
lected by the value in bits D4 and D5.
switched in series with the internal inverter when 32 kHz is
selected via the clock control register. At power–up, the de-
vice sets up for a 4 MHz oscillator and the series resistor is
not part of the oscillator circuit. Until this resistor is switched
in, oscillations may be unstable with the 32 kHz crystal. (See
Figure 12.)
5 – 30 pF
(C1, C2 Values Depend Upon the Crystal Frequency)
For full functionality, the positive power supply pin may
A high written into this bit enables the counter stages of
When this bit is high, clock operation uses the 50 or 60
Accommodation of one of four possible crystals are se-
The MC68HC68T1 has an on–chip 150 k
All bits are reset low by a power–on reset.
START
STOP
MSB
D7
Data transfer to/from the MC68HC68T1 must not
be attempted if the supply voltage falls below
3.0 V.
Figure 12. Recommended Oscillator Circuit
0 = 4.194304 MHz
1 = 2.097152 MHz
XTAL
LINE
D6
C1
C2
SELECT
XTAL
D5
1
10 – 40 pF
REGISTERS
R2
CAUTION
SELECT
R1
XTAL
D4
0
2 = 1.048576 MHz
3 = 32.768 kHz
50 Hz
60 Hz
D3
XTAL in
XTAL out
REAL–TIME CLOCK
MC68HC68T1
OUT
CLK
D2
2
W
MOTOROLA
resistor that is
OUT
CLK
D1
1
LSB
OUT
CLK
D0
0

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