z8l189 ZiLOG Semiconductor, z8l189 Datasheet - Page 70
z8l189
Manufacturer Part Number
z8l189
Description
General-purpose Embedded Controllers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8L189.pdf
(107 pages)
- Current page: 70 of 107
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DOUBLE BUFFERING FOR THE TRANSMITTER IN 16450 MODE (Continued)
Z80189 MIMIC DMA Consideration
Since the /HRXRDY and /HTXRDY is removed in the Z189,
the MIMIC DMA feature found on the Z182 is not available
on the Z189.
70
Zilog
Host TEMT = 1 if - THRE = 1 and
Note: MPU sees TSR bit in the LSR Register as TEMT bit
(MPU TEMT) TSRE = 1
Host & MPU THRE = 1
- TSRE = 1 and
- Emulation delay timer is timed out
Empty/Full
Empty/Full
Figure 79. TEMT Emulation Logic Implementation
0
0
P R E L I M I N A R Y
THR to TSR
Host Write
Shift Reg.
Emulation
Register
Transmit
16450
transfer
THR
delay
TSR
Z80189 MIMIC Design Hint
The MIMIC output drive capability has been increased to
16 mA on the Z189. This may eliminate the need for
buffering to the PC Bus.
Byte Transfer if:
- THRE=0; and
- TSRE = 1; and
- Character delay timer is timed out.
Note: Timer reloads and counts down
whenever data is transferred from THR to TSR.
Added TSR Buffer for the
transmit data
G
ENERAL
-P
URPOSE
E
MBEDDED
DS971890301
Z80189/Z8L189
C
ONTROLLERS
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