z8l189 ZiLOG Semiconductor, z8l189 Datasheet - Page 92

• Manufacturer Part Number: z8l189
• Description: General-purpose Embedded Controllers
• Manufacturer: ZiLOG Semiconductor

Z189 MISCELLANEOUS CONTROL AND INTERFACE REGISTERS (Continued)
The word “Out” means that the Z189 data bus direction is
in output mode, “In” means input mode, and “Z” means
High impedance. D
is the status of the D4 bit in the System Configuration
Register.
Bit 3 Disable ROMs
If this bit is a one it disables the /ROMCS pin. If it is a zero
addresses below the ROM boundary set by the ROMBR
register will cause the /ROMCS pin to go low.
Bit 2 Borrow
For Bit 2 of the System Configuration Register when the bit
is set to 0, the HINTR1/T
bit is set to 1, the HINTR1/T
This bit is set to 1 upon reset.
92
Zilog
I/O and Memory Transactions
Z80189
Data Bus
(DDOUT=0)
Z80189
Data Bus
(DDOUT=1)
Interrupt Acknowledge Transaction
Z80189
Data Bus
(DDOUT=0)
Z80189
Data Bus
(DDOUT=1)
Peripherals
to On-Chip
I/O Write
Peripheral
Intack for
DOUT
On-Chip
Out
Out
Out
Z
OUT
stands for Data Direction out and
is multiplexed to T
OUT
bit is multiplexed to HINTR1.
from On-Chip
Peripherals
Figure 116. Data Bus Direction (Z180 Bus Master)
I/O Read
Peripheral
Intack for
Off-Chip
Out
Z
In
In
OUT
P R E L I M I N A R Y
. When this
Peripherals
to Off-Chip
I/O Write
Out
Out
from Off-Chip
Peripherals
Bit 1 MIMIC/Port A
When this bit is set, MIMIC is multiplexed over Port A. This
is enabled on power-up.
Bit 0 Reserved
Note: MIMIC access is disabled until the first system
configuration register write after Power-up or reset. This
mechanism prevents accidental bus counter from if
/HDCS/HC1 pin is pulled Low. To avoid accidental conten-
tion when /HCS/HC1 is pulled low, it is advisable that the
COM Decode Register is written first prior to when the
system configuration register is initialized.
I/O Read
In
In
Memory
Write to
Out
Out
Write from
G
Memory
ENERAL
In
In
-P
URPOSE
Refresh
Z
Z
E
MBEDDED
DS971890301
Z80189/Z8L189
Idle Mode
Z80189
C
ONTROLLERS
Z
Z