lpc47s457-ns Standard Microsystems Corp., lpc47s457-ns Datasheet - Page 138

• Manufacturer Part Number: lpc47s457-ns
• Description: Advanced I/o With X-bus Interface
• Manufacturer: Standard Microsystems Corp.

Both register have an X-Bus Access Request bit and an X-Bus Access Grant bit. Table 70 offers a summary of how
each bus will be granted the X-Bus.
Request Access to X-Bus
When either bus wants to access the X-Bus, they must set Bit [0] of their respective arbitration register to ‘1’.
Requests are granted on a first-come first-serve basis. Once a request is granted, no other request may be granted
until the bus that is holding the X-Bus resets its request bit to ‘0’.
Note: The request bit should remain high for the duration of the entire transaction. If removed prematurely and if the
other bus is making a request, the transaction will be terminated and the new request will be granted.
To ensure the SMBus can always gain control of the X-Bus, the SMB_ARB Arbitration register has a Master Request
bit. If the LPC interface is unable to clear its request bit, the SMBus can assert a request by placing a ‘1’ on bit[2] of
the SMB_ARB Arbitration register.
X-Bus Access Granted
Each arbitration register has an X-Bus Access Grant bit, which is set by hardware only. Each bus must monitor their
own grant bit to determine when they have been granted access to the X-Bus. Each interface should verify that
access has been granted to them before initiating any I/O transactions.
Note: The LPC Bus is granted access to the X-Bus by default at boot-up. The LPC interface should not clear the
request bit until boot-up is complete.
Note : The ↑ represents a transition from a ‘0’ to a ‘1'.
Note : na means not applicable (i.e. Don’t Care).
Note 1 : If LPC_REQ and SMB_REQ “transition” to a
LPC_GNT=’1’ or SMB_GNT=’1’ based on a first-come first-serve basis. For the case when they transition to a ‘1’ at
the same time, circuitry is implented to prevent oscillation.
SMSC LPC47S45x
SMB_GNT
0
0
0
0
0
0
0
1
1
1
1
1
PAST STATE
OUTPUTS
LPC_GNT
1
1
1
1
1
1
1
0
0
0
0
0
Table 70 − SMBus2/LPC Arbitration Summary
LPC_REQ
na
na
↑
↑
↑
0
0
1
1
0
0
1
DATASHEET
Page 138 of 259
SMB_REQ
INPUTS
na
na
0
1
0
↑
1
↑
0
1
0
1
‘1’ at the same time, arbitration logic produces either
PRESENT STATE
SMB_MRQ
0
0
0
0
0
0
1
0
0
0
0
1
SMB_GNT
Note 1
0
1
0
0
1
1
0
1
0
1
1
OUTPUTS
LPC_GNT
Note 1
1
0
1
1
0
0
1
0
1
0
0
Rev. 08-10-09