lpc47s457-ns Standard Microsystems Corp., lpc47s457-ns Datasheet - Page 24

• Manufacturer Part Number: lpc47s457-ns
• Description: Advanced I/o With X-bus Interface
• Manufacturer: Standard Microsystems Corp.

specific registers, which will generate an IO_PME# signal if the SCI_EN bit is ‘1’ in the PM1_CNTRL1 register at
offset 60h.
See section 7 ACPI/PME/SMI Features on page 147.
6
6.1 Super I/O Registers
The address map, shown below in Table 1, shows the addresses of the different Super I/O blocks immediately after
power up. The base addresses of the FDC, serial and parallel ports, PME register block and configuration register
block can be moved via the configuration registers. Some addresses are used to access more than one register.
6.2 Host Processor Interface (LPC)
The host processor communicates with the LPC47S45x through a series of read/write registers via the LPC interface.
The port addresses for these registers are shown in Table 1. Register access is accomplished through I/O cycles or
DMA transfers. All registers are 8 bits wide.
Note 1: Refer to the configuration register descriptions for setting the base address.
6.3 LPC Interface
The LPC interface is used to control all the logical blocks on the LPC47S45x, to communicate with external I/O
devices via the X-Bus, and to communicate with SMBus devices via the SMBus master/slave controller.
The following sub-sections specify the implementation of the LPC bus. The LPC-to-X-Bus transactions and the LPC-
to- SMBus transactions are described in sections 6.19 X-Bus Interface and 6.17 SMBus Controller. Since both the
LPC interface and the SMBus2 controller can access the X-Bus, an arbitration register has been added to the
Runtime Register block at offset 0x77. For a more detailed description of this arbitration, see section 6.18.3 X-Bus
SMBus2/LPC Arbitration on page 137.
SMSC DS – LPC47S45x
FUNCTIONAL DESCRIPTION
Base+(0-5) and +(7)
Base+(0-3)
Base+(0-7)
Base+(0-3), +(400-402)
Base+(0-7), +(400-402)
Base+(0-7)
Base+(0-7)
Base+(0,1)
60, 64
Base1+0
Base2+0
Base3+0
Base4+0
Base + (0-6C)
Base + (0-3)
Base + (0-1)
ADDRESS
Table 1 − Super I/O Block Addresses
DATASHEET
Floppy Disk
Parallel Port
SPP
EPP
ECP
ECP+EPP+SPP
Serial Port Com 1
Serial Port Com 2
RTC
Bank 0
Bank 1
KYBD
X-Bus
Runtime Registers
SMBus
Configuration
BLOCK NAME
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LOGICAL
DEVICE
A
B
0
3
4
5
6
7
8
IR Support
NOTES
Rev. 04-30-07