lpc47s457-ns Standard Microsystems Corp., lpc47s457-ns Datasheet - Page 188
lpc47s457-ns
Manufacturer Part Number
lpc47s457-ns
Description
Advanced I/o With X-bus Interface
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LPC47S457-NS.pdf
(259 pages)
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REG OFFSET
NAME
DESCRIPTION
(hex)
It is also reset as follows: If the nPB_IN signal is held asserted for
more
than
four
seconds,
then
this
bit
is
cleared,
the
PWRBTNOR_STS bit is set and the system will transition into the
soft off state (nPS_ON floats).
Bit[1] Reserved
Bit[2] RTC_STS
This bit is set when the RTC generates an alarm. Additionally if
the RTC_EN bit is set then the setting of the RTC_STS bit will
generate a an nIO_PME; if the power supply is ‘off’, it will also
cause a wakeup event. When the AL_REM_EN bit is set in the
RTC control register 1, then the RTC_STS bit is set due to an RTC
alarm event occurring when VTR is not present. This will indicate
to the OS the cause of the wakeup event (nPS_ON pin asserted
when VTR returns) caused by the “alarm remember” logic in the
Soft Power Management block. The “alarm remember “ event will
cause a wakeup event when VTR returns if the RTC_STS bit is
set.
This bit is only set by hardware and can only be reset by software
writing a one to this bit position and by Vbat POR. Writing a zero
has no effect.
This wakeup event is blocked when a power button override event
occurs (PWRBTNOR_STS bit set).
Bit[3] PWRBTNOR_STS
This bit is set when the power switch over-ride function is set: If the
nPB_IN signal is held asserted for more than four seconds. In this
case, the nPS_ON signal floats. Hardware is also required to reset
the PWRBTN_STS when issuing a power switch over-ride
function.
This bit is set by hardware and can only be cleared by software
writing a one to this bit position and by Vbat POR. Writing a 0 has
no effect.
When this bit is set, only the power button can wake the system; all
other wakeup events are blocked. This bit must be cleared for
other wake events to function.
Bit[4] Reserved
Bit[5] Reserved
Bit[6] Reserved
Bit[7] WAK_STS
This bit is not set if the WAK_CTRL bit in the power supply control
register is cleared.
If the nPS_ON pin is made to float as a result of setting the
SLP_EN bit, and the WAK_CTRL bit is set, then any enabled
wakeup event will set the WAK_STS bit. If the nPS_ON pin is
made to float by any other means (i.e., power button override
event or power loss) then this bit is not set on return of power.
Cleared by software writing a one to this bit position and by VTR
POR and Vbat POR.
SMSC LPC47S45x
Page 188 of 259
Rev. 08-10-09
DATASHEET
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