uja1078a NXP Semiconductors, uja1078a Datasheet - Page 6

• Manufacturer Part Number: uja1078a
• Description: High-speed Can/dual Lin Core System Basis Chip
• Manufacturer: NXP Semiconductors

NXP Semiconductors
6. Functional description
UJA1078A
Product data sheet
Table 2.
The exposed die pad at the bottom of the package allows for better heat dissipation from
the SBC via the printed-circuit board. The exposed die pad is not connected to any active
part of the IC and can be left floating, or can be connected to GND.
The UJA1078A combines the functionality of a high-speed CAN transceiver, two LIN
transceivers, two voltage regulators and a watchdog (UJA1078A/xx/WD versions) in a
single, dedicated chip. It handles the power-up and power-down functionality of the ECU
and ensures advanced system reliability. The SBC offers wake-up by bus activity, by
cyclic wake-up and by the activation of external switches. Additionally, it provides a
periodic control signal for pulsed testing of wake-up switches, allowing low-current
operation even when the wake-up switches are closed in Standby mode.
All transceivers are optimized to be highly flexible with regard to bus topologies. In
particular, the high-speed CAN transceiver is optimized to reduce ringing (bus reflections).
V1, the main voltage regulator, is designed to power the ECU's microcontroller, its
peripherals and additional external transceivers. An external PNP transistor can be added
to improve heat distribution. V2 supplies the integrated high-speed CAN transceiver. The
watchdog is clocked directly by the on-chip oscillator and can be operated in Window,
Timeout and Off modes.
Symbol
WAKE1
WAKE2
V2
CANH
CANL
GND
SPLIT
LIN1
DLIN
LIN2
WBIAS
VEXCC
TEST2
VEXCTRL
BAT
Pin description
Pin
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
All information provided in this document is subject to legal disclaimers.
Description
local wake-up input 1
local wake-up input 2
5 V voltage regulator output for CAN
CANH bus line
CANL bus line
ground
CAN bus common mode stabilization output
LIN1 bus line
LIN termination resistor connection
LIN2 bus line
control pin for external wake biasing transistor
current measurement for external PNP transistor; this pin is connected to
the collector of the external PNP transistor
test pin; pin should be connected to ground
control pin of the external PNP transistor; this pin is connected to the base
of the external PNP transistor
battery supply for the SBC
Rev. 01 — 9 July 2010
…continued
High-speed CAN/dual LIN core system basis chip
UJA1078A
© NXP B.V. 2010. All rights reserved.
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