pdi1394l21 NXP Semiconductors, pdi1394l21 Datasheet - Page 22

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pdi1394l21

Manufacturer Part Number
pdi1394l21
Description
1394 Full Duplex Av Link Layer Controller
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
12.5.2.4 Self-ID and PHY packets receive
The self-ID and PHY packet receive formats are shown below. The first quadlet contains a synthesized packet header with a tCode of 0xE
(hex). For self-ID information, the remaining quadlets contain data that is received from the time a bus reset ends to the first subaction gap. This
is the concatenation of all the self-ID packets received. Note that the bit-inverted check quadlet is included in the Read Request FIFO and the
application must check it.
The “ackSent” field will either be “ACK_DATA_ERROR” if a non-quadlet-aligned packet is received or there was a data overrun, or
“ACK_COMPLETE” if the entire string of self-ID packets was received.
2000 Aug 24
1394 full duplex AV link layer controller
31 30
3130
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Figure 20. Block Read or Lock Response Receive Format
destinationID
dataLength
sourceID
Figure 21. Self-ID Receive Format
self ID packet data
Block data
spd
00
22
rCode
tLabel
padding (if needed)
extendedTcode
rt
1110
tCode
2
u
ackSent
SV00263
ackSent
SV00264
0000
priority
2
PDI1394L21
Preliminary specification

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