sak-xc2766x-96f66l-ac Infineon Technologies Corporation, sak-xc2766x-96f66l-ac Datasheet - Page 11

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sak-xc2766x-96f66l-ac

Manufacturer Part Number
sak-xc2766x-96f66l-ac
Description
16/32-bit Single-chip Microcontroller With 32-bit Performance
Manufacturer
Infineon Technologies Corporation
Datasheet
Preliminary
Notes to Pin Definitions
1. Ctrl.: The output signal for a port pin is selected by bitfield PC in the associated
2. Type: Indicates the pad type used (St=standard pad, Sp=special pad, DP=double
Table 4
Pin
3
4
5
6
Data Sheet
register Px_IOCRy. Output O0 is selected by setting the respective bitfield PC to
1x00
Output signal OH is controlled by hardware.
pad, In=input pad, PS=power supply) and its power supply domain (A, B, M, 1).
Symbol
TESTM
P7.2
EMUX0
CCU62_
CCPOS0A
TDI_C
TRST
P7.0
T3OUT
T6OUT
TDO_A
ESR2_1
B
, output O1 is selected by 1x01
Pin Definitions and Functions
Ctrl.
I
O0 / I St/B
O1
I
I
I
O0 / I St/B
O1
O2
OH
I
Type Function
In/B
St/B
St/B
St/B
In/B
St/B
St/B
St/B
St/B
Testmode Enable
Enables factory test modes, must be held HIGH for
normal operation (connect to
An internal pullup device will hold this pin high
when nothing is driving it.
Bit 2 of Port 7, General Purpose Input/Output
External Analog MUX Control Output 0 (ADC1)
CCU62 Position Input 0
JTAG Test Data Input
Test-System Reset Input
For normal system operation, pin TRST should be
held low. A high level at this pin at the rising edge
of PORST activates the XC2766X’s debug
system. In this case, pin TRST must be driven low
once to reset the debug system.
An internal pulldown device will hold this pin low
when nothing is driving it.
Bit 0 of Port 7, General Purpose Input/Output
GPT1 Timer T3 Toggle Latch Output
GPT2 Timer T6 Toggle Latch Output
JTAG Test Data Output
ESR2 Trigger Input 1
B
, etc.
9
XC2000 Family Derivatives
General Device Information
V
DDPB
).
V2.0, 2008-03
XC2766X

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