74F794PC Fairchild Semiconductor, 74F794PC Datasheet
74F794PC
Specifications of 74F794PC
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74F794PC Summary of contents
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... input bus. Ordering Code: Order Number Package Number 74F794PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Logic Symbol © 2004 Fairchild Semiconductor Corporation Features 3-STATE outputs on the I/O port D and Q output sink capability ...
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Input Loading/Fan-Out Pin Names OE Output Enable Input CP Clock Pulse Inputs D –D D Bus Inputs 3-STATE Outputs Q –Q Q Bus Outputs 0 7 Truth Table Inputs Outputs ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 3) Input Current (Note 3) ESD Last Passing Voltage (Min) Voltage Applied to Output In HIGH State ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH PHL n t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ t (H) Setup Time, HIGH or ...
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Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at ...