is62wv25616dall Integrated Silicon Solution, Inc., is62wv25616dall Datasheet
is62wv25616dall
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is62wv25616dall Summary of contents
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... Integrated Silicon Solution, Inc. — www.issi.com Rev. A 09/17/2010 DESCRIPTION ISSI The IS62WV25616DALL/IS62WV25616DBLL are high-speed, low power, 4M bit SRAMs organized as 256K words by 16 bits fabricated using performance CMOS technology. T his highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CS1 is HIGH (deselected) or when CS2 is LOW ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL PIN CONFIGURATIONS 48- ball mini BGA (6mm x 8mm) (Package Code I I/O I GND A17 A7 I VDD I/O NC A16 12 F I/O I/O A14 A15 A12 I/O NC A13 A10 A9 PIN DESCRIPTIONS ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL TRUTH TABLE Mode CS1 CS2 WE Not Selected Output Disabled Read H L Write L L ABSOLUTE MAXIMUM RATINGS Symbol Parameter V ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL AC TEST CONDITIONS Parameter (2.3V-3.6V) Input Pulse Level 0. Input Rise and Fall Times Input and Output Timing and Reference Level ( Ref Output Load See Figures 1 and Ω Ω (V) tm AC TEST LOADS R1 VTM OUTPUT 30 pF Including jig and scope Figure 1. 4 Unit Unit ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL DC ELECTRICAL CHARACTERISTICS V = 3.3V + 5% DD Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage iH V Input LOW Voltage ( Input Leakage Li i Output Leakage LO Note (min.) = –0.3V DC; V (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested V (max 0.3V dC; V (max ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL OPERATING RANGE ( Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C Automotive –40°C to +125°C OPERATING RANGE ( Range Ambient Temperature Commercial 0°C to +70°C Industrial – ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time rC t Address Access Time aa t Output Hold Time OHa t t CS1/CS2 Access Time aCs1/ aCs2 t OE Access Time dOe t ( High-Z Output HzOe t ( Low-Z Output LzOe t t (2) CS1/CS2 to High-Z Output HzCs1/ HzCs2 t t CS1/CS2 to Low-Z Output (2) LzCs1/ LzCs2 ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL AC WAVEFORMS READ CYCLE NO. 1 (1,2) (Address Controlled) (CS1 = ADDRESS D OUT PREVIOUS DATA VALID AC WAVEFORMS READ CYCLE NO. 2 (1,3) (CS1, CS2, OE, AND UB/LB Controlled) ADDRESS OE CS1 t CS2 DOUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CS1, UB Address is valid prior to or coincident with CS1 LOW transition. ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time CS1/CS2 to Write End sCs1/ sCs2 t Address Setup Time to Write End aw t Address Hold from Write End Ha t Address Setup Time sa t LB, UB Valid to End of Write Pwb t WE Pulse Width Pwe t Data Setup to Write End sd t Data Hold from Write End LOW to High-Z Output (3) Hzwe t (3) ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL AC WAVEFORMS WRITE CYCLE NO. 1 (1,2) (CS1 Controlled HIGH or LOW) ADDRESS CS1 CS2 WE LB DOUT DATA UNDEFINED DIN Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 , CS2 and WE inputs and at least one of the LB and UB inputs being in the LOW state. 2. WRITE = (CS1) [ (LB) = (UB) ] (WE SCS1 ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL AC WAVEFORMS WRITE CYCLE NO. 2 (WE Controlled HIGH During Write Cycle) ADDRESS OE CS1 CS2 WE LB DOUT DATA UNDEFINED DIN Integrated Silicon Solution, Inc. — www.issi.com Rev. A 09/17/2010 SCS1 t SCS2 PWE t SA HZWE HIGH DATA-IN VALID t HA ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL AC WAVEFORMS WRITE CYCLE NO. 3 (WE Controlled LOW During Write Cycle) ADDRESS OE CS1 CS2 WE LB DOUT DATA UNDEFINED DIN SCS1 t SCS2 PWE t t HZWE LZWE HIGH DATA-IN VALID Integrated Silicon Solution, Inc. — www.issi.com Rev. ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL AC WAVEFORMS WRITE CYCLE NO. 4 (UB/LB Controlled) ADDRESS OE LOW CS1 HIGH CS2 WE UB HZWE D OUT DATA UNDEFINED D IN Integrated Silicon Solution, Inc. — www.issi.com Rev. A 09/17/2010 ADDRESS 1 ADDRESS PBW WORD 1 ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter for Data Retention Data Retention Current dr t Data Retention Setup Time See Data Retention Waveform sdr t Recovery Time rdr Note: 1. Typical values are measured at V DATA RETENTION WAVEFORM CS1 GND DATA RETENTION WAVEFORM CE2 V DR ...
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... Speed (ns) Order Part No. 55 IS62WV25616DALL-55TI TSOP IS62WV25616DALL-55TLI TSOP, Lead-free 55 IS62WV25616DALL-55BI mini BGA (6mmx8mm) IS62WV25616DALL-55BLI mini BGA (6mmx8mm), Lead-free IS62WV25616BLL (2.3V - 3.6V) Industrial Range: –40°C to +85°C Speed (ns) Order Part No. 45 IS62WV25616DBLL-45TI ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL 16 Integrated Silicon Solution, Inc. — www.issi.com Rev. A 09/17/2010 ...
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... IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL Integrated Silicon Solution, Inc. — www.issi.com Rev. A 09/17/2010 17 ...