is62c25616bl Integrated Silicon Solution, Inc., is62c25616bl Datasheet

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is62c25616bl

Manufacturer Part Number
is62c25616bl
Description
256k?x?16?high-speed?cmos?static?ram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
IS62C25616BL, IS65C25616BL
256K x 16 HIGH-SPEED CMOS STATIC RAM
FEATURES
• High-speed access time: 45 ns
• Low Active Power: 50 mW (typical)
• Low Standby Power: 10 mW (typical)
• TTL compatible interface levels
• Single 5V ± 10% power supply
• Fully static operation: no clock or refresh
• Package: 44-pin TSOP (Type II)
• Commercial, Industrial and Automotive temper-
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com —
Rev.  00A
11/23/2010
CMOS standby
required
ature ranges available
Lower Byte
Upper Byte
I/O8-I/O15
I/O0-I/O7
A0-A17
VDD
GND
CE
OE
WE
UB
LB
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
1-800-379-4774
DESCRIPTION
The
speed, 4,194,304-bit static RAMs organized as 262,144
words by 16 bits. They are fabricated using
performance CMOS technology. T his highly reliable process
coupled with innovative circuit design techniques, yields
access times as fast as 12 ns with low power consumption.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be reduced
down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS62C25616BL and IS65C25616BL are packaged in
the JEDEC standard 44-pin TSOP (Type II).
ISSI
MEMORY ARRAY
IS62C25616BL and IS65C25616BL are high-
COLUMN I/O
256K x 16
ADVANCED INFORMATION
DECEMBER 2010
ISSI
's high-
1

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is62c25616bl Summary of contents

Page 1

... Integrated Silicon Solution, Inc. — www.issi.com — Rev.  00A 11/23/2010 DESCRIPTION ISSI The IS62C25616BL and IS65C25616BL are high- speed, 4,194,304-bit static RAMs organized as 262,144 words by 16 bits. They are fabricated using performance CMOS technology. T his highly reliable process coupled with innovative circuit design techniques, yields access times as fast with low power consumption ...

Page 2

... IS62C25616BL, IS65C25616BL  PIN CONFIGURATIONS* 44-Pin TSOP (Type II I/O0 7 I/O1 8 I/ GND 12 I/O4 13 I/O5 14 I/ A16 18 A15 19 A14 20 A13 21 A12 22 *Please contact ISSI at SRAM@issi.com for availability of 48-pin BGA and 44-pin SOJ packages. PIN DESCRIPTIONS A0-A17 Address Inputs I/O0-I/O15 Data Inputs/Outputs Chip Enable Input CE OE Output Enable Input WE Write Enable Input 2 Integrated Silicon Solution, Inc. — ...

Page 3

... IS62C25616BL, IS65C25616BL  TRUTH TABLE         Mode  WE  CE    Not Selected X Output Disabled H X Read Write ABSOLUTE MAXIMUM RATINGS   Symbol  Parameter    V Terminal Voltage with Respect to GND term t Storage Temperature stg P Power Dissipation Output Current (LOW) out Notes: 1 ...

Page 4

... IS62C25616BL, IS65C25616BL  OPERATING RANGE   Range  Ambient Temperature  Commercial 0°C to +70°C Industrial -40°C to +85°C   Automotive -40°C to +125°C POWER SUPPLY CHARACTERISTICS     Symbol Parameter  Test Conditions  I Average operating Current out ...

Page 5

... IS62C25616BL, IS65C25616BL  READ CYCLE SWITCHING CHARACTERISTICS     Symbol  Parameter  t Read Cycle Time rc t Address Access Time aa t Output Hold Time oHa t CE Access Time ace t OE Access Time doe High-Z Output (2) Hzoe Low-Z Output (2) Lzoe t ( High-Z Output Hzce t ( Low-Z Output Lzce t LB, UB Access Time High-Z Output Hzb ...

Page 6

... IS62C25616BL, IS65C25616BL  AC WAVEFORMS READ CYCLE NO. 1 (Address Controlled) ( (1,2) ADDRESS D OUT PREVIOUS DATA VALID READ CYCLE NO. 2 (CE, OE and UB/LB Controlled) (1,3)  ADDRESS LZCE LB LZB HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE, UB Address is valid prior to or coincident with CE LOW transition. ...

Page 7

... IS62C25616BL, IS65C25616BL  WRITE CYCLE SWITCHING CHARACTERISTICS     Symbol  Parameter  t Write Cycle Time Write End sce t Address Setup Time aw to Write End t Address Hold from Write End Ha t Address Setup Time sa t LB, UB Valid to End of Write Pwb t WE Pulse Width (OE =High) 1 Pwe t WE Pulse Width (OE=Low) 2 Pwe t Data Setup to Write End sd t Data Hold from Write End Hd t (2) WE LOW to High-Z Output Hzwe ...

Page 8

... IS62C25616BL, IS65C25616BL  AC WAVEFORMS WRITE CYCLE NO. 1 (WE Controlled) ADDRESS UB DATA UNDEFINED OUT D IN Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least one of the LB and UB inputs being in the LOW state WRITE = (CE) (LB) = (UB) (WE). 8 Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 9

... IS62C25616BL, IS65C25616BL  WRITE CYCLE NO. 2 (OE is HIGH During Write Cycle) ADDRESS OE CE LOW UB DATA UNDEFINED OUT D IN WRITE CYCLE NO. 3 (OE is LOW During Write Cycle) ADDRESS LOW OE CE LOW UB DATA UNDEFINED OUT D IN Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write ...

Page 10

... IS62C25616BL, IS65C25616BL  WRITE CYCLE NO. 4 (UB/LB Back to Back Write) ADDRESS OE CE LOW WE UB HZWE D OUT DATA UNDEFINED Integrated Silicon Solution, Inc. — www.issi.com — ADDRESS 1 ADDRESS PBW PBW WORD 1 WORD 2 HIGH ...

Page 11

... IS62C25616BL, IS65C25616BL  DATA RETENTION SWITCHING CHARACTERISTICS   Symbol  Parameter  for Data Retention Data Retention Current dr t Data Retention Setup Time See Data Retention Waveform sdr t Recovery Time rdr Note:  1. Typical Values are measured 5V DATA RETENTION WAVEFORM (CE Controlled) VDD 4. GND Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 12

... IS62C25616BL, IS65C25616BL  ORDERING INFORMATION: IS62C25616BL Industrial Range: –40°C to +85°C   Speed (ns)  Order Part No.  45 IS62C25616BL-45TI IS62C25616BL-45TLI Automotive Range: –40°C to +125°C   Speed (ns)  Order Part No.  ...

Page 13

... IS62C25616BL, IS65C25616BL  Integrated Silicon Solution, Inc. — www.issi.com — Rev.  00A 11/23/2010 1-800-379-4774 13 ...

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