is62vv25616ll Integrated Silicon Solution, Inc., is62vv25616ll Datasheet

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is62vv25616ll

Manufacturer Part Number
is62vv25616ll
Description
256k X 16 Low Voltage, 1.8v Ultra Low Power Cmos Static Ram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
IS62VV25616LL
FUNCTIONAL BLOCK DIAGRAM
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. B
08/07/02
FEATURES
• High-speed access time: 70, 85, ns
• CMOS low power operation
• Single 1.7V- 2.25 V
• Fully static operation: no clock or refresh
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in the 44-pin TSOP (Type II) and
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
256K x 16 LOW VOLTAGE, 1.8V ULTRA
LOW POWER CMOS STATIC RAM
– 36 mW (typical) operating
– 9 µW (typical) CMOS standby
required
48-pin mini BGA (7.2mm x 8.7mm)
DD
Lower Byte
Upper Byte
I/O8-I/O15
power supply
I/O0-I/O7
A0-A17
V
GND
DD
WE
OE
CE
UB
LB
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
1-800-379-4774
DESCRIPTION
The
static RAMs organized as 262,144 words by 16 bits. They
are fabricated using
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
For the IS62VV25616LL, when CE is HIGH (deselected)
or CE is low and both LB and UB are HIGH, the device
assumes a standby mode at which the power dissipation
can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS62VV25616LL is packaged in the JEDEC standard
44-pin TSOP (Type II) and 48-pin mini BGA (7.2mm x 8.7mm).
MEMORY ARRAY
ISSI
COLUMN I/O
256K x 16
IS62VV25616LL is a high-speed, 4,194,304 bit
ISSI
's high-performance CMOS
ISSI
AUGUST 2002
®
1

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is62vv25616ll Summary of contents

Page 1

... Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS62VV25616LL is packaged in the JEDEC standard 44-pin TSOP (Type II) and 48-pin mini BGA (7.2mm x 8.7mm). 256K x 16 DECODER ...

Page 2

... IS62VV25616LL PIN CONFIGURATIONS 44-Pin TSOP (Type II I/O0 7 I/O1 8 I/ GND 12 I/O4 13 I/O5 14 I/ A16 18 A15 19 A14 20 A13 21 A12 22 PIN DESCRIPTIONS A0-A17 Address Inputs I/O0-I/O15 Data Inputs/Outputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input ...

Page 3

... IS62VV25616LL OPERATING RANGE Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Terminal Voltage with Respect to GND TERM V Vdd Related to GND DD T Storage Temperature STG P Power Dissipation T Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...

Page 4

... IS62VV25616LL AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load AC TEST LOADS 3070 2.8V OUTPUT 30 pF Including jig and scope Figure 1 4 Unit 0. 0. 0.9V See Figures 1 and 2 3150 Figure 2 Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 5

... IS62VV25616LL POWER SUPPLY CHARACTERISTICS Symbol Parameter I Vdd Dynamic Operating V CC Supply Current I Operating Supply 1 CC Current I TTL Standby Current 1 SB (TTL Inputs) OR ULB Control I CMOS Standby 2 SB Current (CMOS Inputs ULB Control Note address and data inputs are cycling at the maximum frequency means no input lines change. ...

Page 6

... IS62VV25616LL AC WAVEFORMS (Address Controlled) ( READ CYCLE NO. 1 (1,2) ADDRESS D OUT PREVIOUS DATA VALID AC WAVEFORMS (1,3) (CE, OE, AND UB/LB Controlled) READ CYCLE NO. 2 ADDRESS LZCE LB LZB HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE, UB Address is valid prior to or coincident with CE LOW transition. ...

Page 7

... IS62VV25616LL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCE t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA LB, UB Valid to End of Write t PWB WE Pulse Width t PWE t Data Setup to Write End ...

Page 8

... IS62VV25616LL WRITE CYCLE NO. 2 (WE Controlled HIGH During Write Cycle) ADDRESS OE CE LOW UB DATA UNDEFINED OUT D IN (WE Controlled LOW During Write Cycle) WRITE CYCLE NO. 3 ADDRESS OE LOW CE LOW UB DATA UNDEFINED OUT VALID ADDRESS ...

Page 9

... IS62VV25616LL WRITE CYCLE NO. 4 (UB/LB Controlled) ADDRESS OE CE LOW WE UB HZWE D OUT DATA UNDEFINED D IN DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V Vdd for Data Retention DR I Data Retention Current DR t Data Retention Setup Time SDR t Recovery Time RDR DATA RETENTION WAVEFORM ...

Page 10

... IS62VV25616LL-70M MiniBGA (7.2mmx8.7mm) 85 IS62VV25616LL-85T TSOP (Type II) IS62VV25616LL-85M MiniBGA (7.2mmx8.7mm) Industrial Range: –40°C to +85°C Speed Order Part No. (ns) 70 IS62VV25616LL-70TI IS62VV25616LL-70MI 85 IS62VV25616LL-85TI IS62VV25616LL-85MI 10 Package TSOP (Type II) MiniBGA (7.2mmx8.7mm) TSOP (Type II) MiniBGA (7.2mmx8.7mm) Integrated Silicon Solution, Inc. — www.issi.com — ISSI ® ...

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