is42s16160a1-7t Integrated Silicon Solution, Inc., is42s16160a1-7t Datasheet

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is42s16160a1-7t

Manufacturer Part Number
is42s16160a1-7t
Description
256 Mb Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
IS42S83200A1
IS42S16160A1
256 Mb Synchronous DRAM
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
10/28/05
FEATURES
DESCRIPTION
IS42S83200A1 is a synchronous 256Mb SDRAM and is
organized as 4-bank x 8,388,608-word x 8-bit; and
IS42S16160A1 is organized as 4-bank x 4,194,304-word x
16-bit. All inputs and outputs are referenced to the rising
edge of CLK.
- Single 3.3V ±0.3V power supply
- Max. Clock frequency:
- Fully synchronous operation referenced to clock rising edge
- 4-bank operation controlled by BA0,BA1(Bank Address)
- /CAS latency- 2/3 (programmable)
- Burst length- 1/2/4/8/FP (programmable)
- Burst type- Sequential and interleave burst (programmable)
- Byte Control- DQML and DQMU (IS42S16160A1)
- Random column access
- Auto precharge / All bank precharge controlled by A10
- Auto and self refresh
- 8192 refresh cycles /64ms(4 banks concurrent refresh)
- LVTTL Interface
- Row address A0-12 /Column address A0-9(x8) / A0-8(x16)
- Package: 400-mil, 54-pin Thin Small Outline (TSOP II) with 0.8mm lead pitch
- Lead-free available
tCLK
tRAS Active to Precharge Command Period (Min.)
tRCD
tAC
tRC
Icc1
Icc6
-7:143MHz<3-3-3>
-75:133MHz<3-3-3>
-6:166MHz<3-3-3>
Operation Current (Single Bank)
Self Refresh Current
Clock Cycle Time
Row to Column Delay
Access Time from CLK
Ref /Active Command Period
ITEM
(4-bank x 8,388,608 - word x 8-bit)
(4-bank x 4,194,304 - word x 16-bit)
(Max.) -6,-7,-75
(Max.)
(Max.)
(Min.)
(Min.)
(Min.)
IS42S83200A1
IS42S16160A1
CL=2
CL=3
CL=2
CL=3
suitable for main memories or graphic
IS42S83200A1 and IS42S16160A1 achieve very
high speed clock rates up to 166MHz, and are
memories in computer systems.
IS42S83200A1/16160A1
130
-6
60
42
15
-
-
5
-
3
6
130
5.4
-7
45
20
63
-
-
-
3
7
67.5
-75
110
7.5
5.4
10
45
20
-
3
6
Unit
ns
ns
ns
ns
ns
ns
mA
mA
ns
mA
October 2005
ISSI
®
1

Related parts for is42s16160a1-7t

is42s16160a1-7t Summary of contents

Page 1

... IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) 256 Mb Synchronous DRAM DESCRIPTION IS42S83200A1 is a synchronous 256Mb SDRAM and is organized as 4-bank x 8,388,608-word x 8-bit; and IS42S16160A1 is organized as 4-bank x 4,194,304-word x 16-bit. All inputs and outputs are referenced to the rising edge of CLK. FEATURES ITEM tCLK Clock Cycle Time tRAS Active to Precharge Command Period (Min ...

Page 2

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) PIN CONFIGURATION (TOP VIEW) Vdd DQ0 VddQ NC DQ1 VssQ NC DQ2 VddQ NC DQ3 VssQ NC Vdd NC /WE /CAS /RAS /CS BA0 BA1 A10/ Vdd CLK : Master Clock CKE : Clock Enable /CS : Chip Select ...

Page 3

... Memory Array 8192x1024x8 Cell Array Bank #0 Mode Register Address Buffer A0-12 BA0,1 Note:This figure shows the IS42S83200A1 The IS42S16160A1 configuration is 8192x512x16 of cell array and DQ0-15 Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. B 10/28/05 DQ0-7 I/O Buffer Memory Array Memory Array 8192x1024x8 8192x1024x8 Cell Array ...

Page 4

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) PIN FUNCTION CLK Input CKE Input /CS Input /RAS, /CAS, /WE Input A0-12 Input BA0,1 Input DQ0-7(x8), Input / Output DQ0-15(x16) DQM(x8), Input DQMU/L(x16) Vdd, Vss Power Supply VddQ, VssQ Power Supply 4 Master Clock: ...

Page 5

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) BASIC FUNCTIONS The IS42S83200A1/16160A1 provides basic functions, bank (row) activate, burst read / write, bank (row) precharge, and auto / self refresh. Each command is defined by control signals of /RAS, CLK /CS /RAS /CAS /WE CKE A10 Activate (ACT) [/RAS =L, /CAS =/WE =H] ACT command activates a row in an idle bank indicated by BA ...

Page 6

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) COMMAND TRUTH TABLE COMMAND MNEMONIC Deselect DESEL No Operation NOP Row Address Entry & ACT Bank Activate Single Bank Precharge PRE Precharge All Banks PREA Column Address Entry WRITE & Write Column Address Entry & ...

Page 7

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) FUNCTION TRUTH TABLE Current State /CS /RAS /CAS IDLE ROW ACTIVE ...

Page 8

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) FUNCTION TRUTH TABLE (continued) Current State /CS /RAS WRITE READ with AUTO L H PRECHARGE ...

Page 9

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) FUNCTION TRUTH TABLE (continued) Current State /CS /RAS /CAS PRE - CHARGING ROW ACTIVATING ...

Page 10

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) FUNCTION TRUTH TABLE (continued) Current State /CS /RAS RE FRESHING MODE L H REGISTER L L SETTING ABBREVIATIONS: H=High Level, L=Low Level, X=Don't Care ...

Page 11

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) FUNCTION TRUTH TABLE (continued) CKE CKE Current State n SELF- REFRESH POWER L H DOWN ALL BANKS H L IDLE ...

Page 12

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) SIMPLIFIED STATE DIAGRAM MODE REGISTER SET CLK SUSPEND CKEL WRITE WRITE SUSPEND CKEH WRITEA CKEL WRITEA WRITEA SUSPEND CKEH POWER APPLIED POWER ON 12 REFS REFSX MRS REFA IDLE CKEL CKEH ACT ...

Page 13

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) POWER ON SEQUENCE Before starting normal operation, the following power on sequence is necessary to prevent a SDRAM from damaged or malfunctioning. 1. Apply power and start clock. Attempt to maintain CKE high, DQM high and NOP condition at the inputs ...

Page 14

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) CLK Command Read Address Y DQ /CAS Latency CL= 3 BL= 4 Initial Address ...

Page 15

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) OPERATIONAL DESCRIPTION BANK ACTIVATE The SDRAM has four independent banks. Each bank is activated by the ACT command with the bank ad- dresses (BA0,1). A row is indicated by the row ad- dresses A0-12. The minimum activation interval be- tween one bank and the other bank is tRRD.Multiple banks can be active state concurrently by issuing mul­ ...

Page 16

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Multi Bank Interleaving Read (CL=2, BL=4) CLK Command ACT tRCD A0-9,11-12 Xa A10 Xa BA0 Read with Auto-Precharge (CL=2, BL=4) CLK Command ACT tRCD A0-9,11-12 Xa A10 Xa BA0 Auto-Precharge Timing (READ, BL=4) CLK Command ACT tRCD DQ CL=2 DQ CL=3 16 READ ACT ...

Page 17

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) WRITE A WRITE command can be issued to any active bank. The start address is specified by A0-9(x8), A0-8(x16). 1st input data is set at the same cycle as the WRITE. The consecutive data length to be write is defined by the Burst Length. The address sequence of burst data is defined by Burst Type ...

Page 18

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) BURST INTERRUPTION [ Read Interrupted by Read ] Burst read operation can be interrupted by new read of any bank. Random column access is allowed READ to READ interval is minimum 1 CLK.. Read interrupted by Read (CL=2, BL=4) CLK Command READ A0-9,11-12 Ya A10 0 BA0-1 ...

Page 19

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) [ Read Interrupted by Precharge ] Burst read operation can be interrupted by precharge of the same bank . READ to PRE interval is minimum 1 CLK. A PRE command to output disable latency is CLK Command DQ Command C L=2 DQ Command DQ Command DQ Command C L=3 DQ Command DQ Integrated Silicon Solution, Inc. — ...

Page 20

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) [Read Interrupted by Burst Terminate] Similarly to the precharge, a burst terminate command can interrupt the burst read operation and disable the data output. The terminated bank remains active. CLK Command DQ Command C L=2 DQ Command ...

Page 21

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) [ Write Interrupted by Write ] Burst write operation can be interrupted by new write of any bank. Random column access is allowed. WRITE to WRITE interval is minimum 1 CLK. CLK Command Write A0-9,11-12 Ya A10 0 BA0 Da0 Da1 [ Write Interrupted by Read ] Burst write operation can be interrupted by read of the same or the other bank ...

Page 22

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) [ Write Interrupted by Precharge ] Burst write operation can be interrupted by precharge of the same bank.Write recovery time(tWR) is required from the last data to PRE command. During write recovery, data inputs must be masked by DQM. CLK Command ...

Page 23

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) [Write with Auto-Precharge Interrupted by Write or Read to another Bank] Burst write with auto-precharge can be interrupted by write or read to another bank. Next ACT command can be issued after(BL+tWR-1+ tRP) from the WRITEA. Auto-precharge interruption by a command to the same bank is inhibited ...

Page 24

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) [Read with Auto-Precharge Interrupted by Read to another Bank] Burst write with auto-precharge can be interrupted by write or read to another bank. Next ACT command can be issued after (BL+tRP) from the READA. Auto-precharge interruption by a command to the same bank is inhibited ...

Page 25

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) AUTO REFRESH Single cycle of auto-refresh is initiated with a REFA (/CS= /RAS= /CAS= L, /WE= /CKE= H) command. The refresh address is generated internally. 8192 REFA cycles within 64ms refresh 256M bit memory cells. The auto-refresh is performed on 4 banks ...

Page 26

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) SELF REFRESH Self-refresh mode is entered by issuing a REFS command (/CS= /RAS= /CAS= L, /WE= H, CKE= L). Once the self-refresh is initiated maintained as long as CKE is kept low. During the self-refresh mode, CKE is asynchronous and the only enabled input . ...

Page 27

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) CLK SUSPEND CKE controls the internal CLK at the following cycle. Figure below shows how CKE works. By negating CKE, the next internal CLK is suspended. The purpose of CLK suspend is power down, output suspend or input ext ...

Page 28

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) DQM CONTROL DQM is a dual function signal defined as the data mask for writes and the output disable for reads. During writes, DQM(U,L) masks input data word by word. DQM(U,L) CLK Command Write ...

Page 29

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) ABSOLUTE MAXIMUM RATINGS Symbol Parameter Vdd Supply Voltage Supply Voltage for Output VddQ VI Input Voltage VO Output Voltage IO Output Current Pd Power Dissipation Topr Operating Temperature Tstg Storage Temperature RECOMMENDED OPERATING CONDITIONS ˚C ,unless otherwise noted) ...

Page 30

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) AVERAGE SUPPLY CURRENT from Vdd (Ta=0 - 70˚C, Vdd=VddQ=3.3±0.3V,Vss=VssQ=0V, unless otherwise noted) ITEM Operating current Precharge Standby current in Non-Power down mode Precharge Standby current in Power down mode Active Standby current Burst current ...

Page 31

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) AC TIMING REQUIREMENTS (Ta=0 - 70˚C, Vdd=VddQ=3.3±0.3V,Vss=VssQ=0V, unless otherwise noted) Input Pulse Levels:0.8V-2.0V Input Timing Measurement Level:1.4V Parameter Symbol tCLK CLK cycle time tCH CLK High pulse width tCL CLK Low pulse width ...

Page 32

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) SWITCHING CHARACTERISTICS (Ta=0 - 70˚C, Vdd=VddQ=3.3±0.3V,Vss=VssQ=0V, unless otherwise noted) Symbol Parameter tAC Access time from CLK Output Hold time tOH from CLK Delay time , output low- tOLZ impedance from CLK Delay time , output high- ...

Page 33

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Burst Write (Single Bank) [BL= CLK /CS /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 WRITE#0 Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. B 10/28/ ...

Page 34

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Burst Write (Multi Bank) [BL= CLK /CS tRRD /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 WRITE tRC tRC tRAS tRP tRCD tWR ...

Page 35

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Burst Read (Single Bank) [CL=2, BL= CLK /CS tRAS /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 READ#0 Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. B 10/28/ ...

Page 36

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Burst Read (Multi Bank) [CL=2, BL= CLK /CS tRRD /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 READA tRC tRC tRCD tRCD ...

Page 37

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Write Interrupted by Write [BL= CLK /CS tRRD /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 WRITE#0 ACT#1 Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. B 10/28/ ...

Page 38

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Read Interrupted by Read [CL=2, BL= CLK /CS tRRD /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 READ#0 ACT tRCD ...

Page 39

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Write Interrupted by Read, Read Interrupted by Write [CL=2, BL= CLK /CS tRRD /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X X A12 X X BA0 ACT#0 WRITE#0 ACT#1 Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev ...

Page 40

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Write / Read Terminated by Precharge [CL=2, BL= CLK /CS /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 WRITE tRP tRAS tRCD tWR ACT#0 ...

Page 41

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Write / Read Terminated by Burst Terminate [CL=2, BL= CLK /CS /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 WRITE#0 TBST Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. B 10/28/ ...

Page 42

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Single Write Burst Read [CL=2, BL= CLK /CS /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 WRITE READ#0 Italic paramater shows minimum case Integrated Silicon Solution, Inc. — ...

Page 43

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Power-Up Sequence and Intialize CLK 200 s /CS tRP /RAS /CAS /WE CKE DQM A0-9,11 A10 A12 BA0,1 DQ NOP Power On PRE ALL Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. B 10/28/05 tRFC REFA REFA REFA Minimum 8 REFA cycles ...

Page 44

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Auto Refresh CLK /CS tRP /RAS /CAS /WE CKE DQM A0-9,11 A10 A12 BA0,1 DQ PRE ALL REFA All banks must be idle before REFA is issued tRFC ACT#0 Italic paramater shows minimum case Integrated Silicon Solution, Inc. — ...

Page 45

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Self Refresh CLK /CS tRP /RAS /CAS /WE CKE DQM A0-9,11 A10 A12 BA0,1 DQ PRE ALL Self Refresh Entry All banks must be idle before REFS is issued. Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev ...

Page 46

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) CLK Suspension [CL=2, BL= CLK /CS /RAS tRCD /CAS /WE CKE DQM A0-9, A10 X A12 X BA0 ACT#0 WRITE#0 internal CLK READ#0 suspended Italic paramater shows minimum case Integrated Silicon Solution, Inc. — ...

Page 47

... IS42S83200A1 (4-bank x 8,388,608 - word x 8-bit) IS42S16160A1 (4-bank x 4,194,304 - word x 16-bit) Power Down CLK /CS /RAS /CAS /WE CKE DQM A0-9,11 A10 A12 BA0,1 DQ PRE ALL Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. B 10/28/ Standby Power Down ACT#0 ...

Page 48

... Frequency Speed (ns) 166 MHz 6 143 MHz 7 133 MHz 7.5 48 Order Part No. Package IS42S16160A1-6T 54-pin TSOP-II IS42S16160A1-7T 54-pin TSOP-II IS42S83200A1-75T 54-pin TSOP-II Order Part No. Package IS42S16160A1-6TL 54-pin TSOP-II IS42S16160A1-7TL 54-pin TSOP-II IS42S83200A1-75TL 54-pin TSOP-II Integrated Silicon Solution, Inc. — 1-800-379-4774 ISSI ® Rev. B 10/28/05 ...

Page 49

... C 0.12 0.21 D 22.02 22.42 E1 10.03 10.29 E 11.56 11.96 e 0.80 BSC L 0.40 0.60 L1 — — ZD 0.71 REF 0° 8° Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. C 01/28/02 N/2 Inches Min Max No. Leads (N) — 0.047 0.002 0.006 — — 0.012 0.018 0.005 0.0083 0.867 0.8827 0.395 0.405 0.455 0.471 0.031 BSC 0.016 0.024 — ...

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