m58bw016bt STMicroelectronics, m58bw016bt Datasheet - Page 20
m58bw016bt
Manufacturer Part Number
m58bw016bt
Description
16 Mbit 512kb X32, Boot Block, Burst 3v Supply Flash Memories
Manufacturer
STMicroelectronics
Datasheet
1.M58BW016BT.pdf
(63 pages)
- Current page: 20 of 63
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M58BW016BT, M58BW016BB, M58BW016DT, M58BW016DB
Table 7. Burst Configuration Register
Note: 1. 4 - 2 - 2 - 2 is not allowed.
20/63
M13-M11
2. X latencies can be calculated as: (t
3. Y latencies can be calculated as: t
4. t
M5-M4
M2-M0
M15
M14
M10
Bit
M9
M8
M7
M6
M3
is the clock period).
SYSTEM MARGIN
Read Select
Y-Latency
Valid Data Ready
Burst Type
Valid Clock Edge
Wrapping
Burst Length
X-Latency
is the time margin required for the calculation.
Description
(3)
(2)
KHQV
AVQV
+ t
– t
0
1
001
010
011
100
101
110
0
1
0
1
0
1
0
1
0
1
001
010
111
SYSTEM MARGIN
Value
LLKH
+ t
QVKH
Synchronous Burst Read
Asynchronous Read (Default at power-on)
Reserved
Reserved
4, 4-1-1-1
5, 5-1-1-1, 5-2-2-2
6, 6-1-1-1, 6-2-2-2
7, 7-1-1-1, 7-2-2-2
8, 8-1-1-1, 8-2-2-2
Reserved
One Burst Clock cycle
Two Burst Clock cycles
R valid Low during valid Burst Clock edge
R valid Low one data cycle before valid Burst Clock edge
Interleaved
Sequential
Falling Burst Clock edge
Rising Burst Clock edge
Reserved
Wrap
No wrap
4 Double-Words
8 Double-Words
Continuous
) + t
+ t
SYSTEM MARGIN
QVKH
(1)
< Y t
K.
< (X -1) t
Description
K.
(X is an integer number from 4 to 8 and t
K
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