is24c128-3z Integrated Silicon Solution, Inc., is24c128-3z Datasheet
is24c128-3z
Related parts for is24c128-3z
is24c128-3z Summary of contents
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... KHz IS24C128-3 2.5V-5.5V 400 KHz DESCRIPTION The IS24C128 1.8V (1.8V-5.5V) 128K-bit (16384 x 8) Electrically Erasable PROM, IS24C128 2.5V (2.5V- 5.5V) 128K-bit (16384 x 8) Electrically Erasable PROM, IS24C256 1.8V (1.8V-5.5V) 256K-bit (32768 x 8) Electrically Erasable PROM and the IS24C256 2.5V (2.5V-5.5V) 256K-bit (32768 x 8) Electrically Erasable PROM. ...
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... IS24C128-2/3 IS24C256-2/3 FUNCTIONAL BLOCK DIAGRAM Vcc 8 SDA 5 SCL SLAVE ADDRESS REGISTER & COMPARATOR GND 4 nMOS 2 CONTROL LOGIC WORD ADDRESS COUNTER ACK Integrated Silicon Solution, Inc. — www.issi.com — ISSI HIGH VOLTAGE GENERATOR, TIMING & CONTROL EEPROM ARRAY Y DECODER Clock > ...
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... IS24C128-2/3 IS24C256-2/3 PIN CONFIGURATION 8-Pin DIP and SOIC GND 4 5 PIN DESCRIPTIONS A0-A1 Address Inputs SDA Serial Address/Data I/O SCL Serial Clock Input WP Write Protect Input Vcc Power Supply GND Ground SCL This input clock pin is used to synchronize the data transfer to and from the device ...
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... IS24C128-2/3 IS24C256-2/3 DEVICE OPERATION The IS24CXXX family features a serial communication and supports a bi-directional 2-wire bus transmission protocol. 2-WIRE BUS The two-wire bus is defined as a Serial Data line (SDA), and a Serial Clock Line (SCL). The protocol defines any device that sends data onto the SDA bus as a transmitter, and the receiving devices as a receiver ...
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... When the memory address boundary (32767 for IS24C256-2 and IS24C256-3; 16383 for IS24C128-2 and IS24C128-3) is reached, the address counter “rolls over” to address 0, and the IS24CXXX-2 continues to output data for each ACKnowledge received. ...
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... IS24C128-2/3 IS24C256-2/3 Figure 1. Typical System Bus Configuration SDA SCL Figure 2. Output Acknowledge SCL from Master Data Output from Transmitter Data Output from Receiver Figure 3. START and STOP Conditions SCL SDA 6 Vcc Master IS24Cxx Transmitter/ Receiver Integrated Silicon Solution, Inc. — www.issi.com — ...
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... IS24C128-2/3 IS24C256-2/3 Figure 4. Data Validity Protocol SCL SDA Figure 5. Slave Address BIT Figure 6. Byte Write Device R Address T SDA Bus Activity Figure 7. Page Write Device R T Word Address (n) Address T E SDA A Bus Activity R/W Integrated Silicon Solution, Inc. — www.issi.com — ...
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... IS24C128-2/3 IS24C256-2/3 Figure 8. Current Address Read Activity Figure 9. Random Address Read Device R T Address T E SDA A Bus C K Activity R/W DUMMY WRITE Figure 10. Sequential Read R E Device A Address D SDA A Bus C Activity K R Device ...
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... Exposure to absolute maximum rating conditions for extended periods may affect reliability. OPERATING RANGE (IS24C256-2 and IS24C128-2) Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C OPERATING RANGE (IS24C256-3 and IS24C128-3) Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C (1,2) CAPACITANCE ...
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... IS24C128-2/3 IS24C256-2/3 DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Output LOW Voltage Output LOW Voltage Input HIGH Voltage IH V Input LOW Voltage IL I Input Leakage Current LI I Output Leakage Current LO Notes: V min and V max are reference only and are not tested ...
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... IS24C128-2/3 IS24C256-2/3 AC WAVEFORMS Figure 11. Bus Timing t R SCL t SU:STA SDA IN SDA OUT Figure 12. Write Cycle Timing SCL 8th BIT SDA WORD n Integrated Silicon Solution, Inc. — www.issi.com — ADVANCED INFORMATION Rev. 00B 07/02/ HIGH LOW t HD:DAT t t HD:STA SU:DAT ...
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... IS24C256-2PI 300-mil Plastic DIP IS24C256-2GI Small Outline (JEDEC STD) IS24C256-2ZI TSSOP IS24C128-3PI 300-mil Plastic DIP IS24C128-3GI Small Outline (JEDEC STD) IS24C128-3ZI TSSOP IS24C256-3PI 300-mil Plastic DIP IS24C256-3GI Small Outline (JEDEC STD) IS24C256-3ZI TSSOP Integrated Silicon Solution, Inc. — www.issi.com — ISSI ® ...