lm5034mtcx National Semiconductor Corporation, lm5034mtcx Datasheet - Page 14

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lm5034mtcx

Manufacturer Part Number
lm5034mtcx
Description
High Voltage Dual Interleaved Current Mode Controller With Active Clamp
Manufacturer
National Semiconductor Corporation
Datasheet

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Functional Description
The LM5034 contains all the features necessary to imple-
ment two independently regulated current mode dc/dc con-
verters, or a single high current converter comprised of two
parallel interleaved channels using the Forward/ Active
Clamp topology. The two controllers operate 180˚ out of
phase from a common oscillator, thereby reducing input
ripple current. Each regulator channel contains a complete
PWM controller, current sense input, soft-start circuit, main
gate driver output, and active clamp driver output. Common
to both channels are the startup and V
under-voltage lockout, 2 MHz capable oscillator, maximum
duty cycle control, overlap time setting, and the hiccup mode
fault protection circuit.
The main gate driver outputs (OUT1, OUT2) are designed to
drive N-channel MOSFETs. Their compound configuration
reduces the turn-off-time, thereby reducing switching losses.
The active clamp outputs (AC1, AC2) are designed to drive
P-channel MOSFETs. The adjustable overlap time of the
active clamp outputs relative to the main outputs produces a
deadtime between the main switch and the P-channel active
clamp switch. Additional features include thermal shutdown,
slope compensation, and the oscillator synchronization ca-
pability.
Line Under-Voltage Lock Out,
UVLO, Shutdown
The LM5034 contains a line under-voltage lockout circuit
(UVLO) designed to enable the V
drivers when the system voltage (V
sired level (see Figure 18). V
applied to the transformer primary, and usually connected to
the VIN pin (see the schematic on Page 1). The threshold at
the UVLO comparator is 1.25V. An external resistor divider
connected from V
pin when V
When V
output drivers are disabled, and the internal 20 µA current
source is off. When V
parator output switches low to enable the internal circuits
and the 20 µA current source. The 20 µA flows into the
external divider’s junction, raising the voltage at UVLO,
thereby providing hysteresis. Internally the voltage at UVLO
also drives the Maximum Duty Cycle Limiter circuit (de-
scribed below), which may influence the values chosen for
the UVLO pin resistors. At maximum V
UVLO should not exceed 6V. Refer to the Applications Infor-
mation section for a procedure to calculate the resistors
values.
The LM5034 controllers can be shutdown by forcing the
UVLO pin below 1.25V with an external switch. When the
UVLO pin is low, the outputs and the V
disabled, and the LM5034 enters a low power mode. If the
VCC pins are not powered from an external source, the
current into VIN drops to a nominal 500 µA. If the VCC pins
are powered from an external source, the current into VIN is
nominally 50 µA, and the current into the VCC pins is ap-
proximately 4.3 mA. To disable one regulator without affect-
ing the other, see the description of the Soft-start section.
PWR
PWR
is below the threshold the V
is increased to the desired turn-on threshold.
PWR
to ground provides 1.25V at the UVLO
PWR
reaches the threshold, the com-
PWR
CC
is the voltage normally
PWR
regulator and output
PWR
CC
) exceeds the de-
CC
CC
, the voltage at
regulators, line
regulator and
regulator are
14
Startup Regulator, VIN, VCC1,
VCC2
The high voltage startup regulator is integral to the LM5034.
The input pin VIN can be connected directly to a voltage
between 13V and 100V, with transient capability to 105V.
The startup regulator provides bias voltages to the series
pass V
is disabled until the voltage at the UVLO pin (described
above) exceeds 1.25V. For applications where V
ceeds 100V the internal startup regulator can be powered
from an external startup regulator or other available low
voltage source. See the Applications Information section for
details.
The V
VCC regulator output. When the series pass regulator is
enabled and the internal V
the UVT comparator activates the PWM controller and out-
put drivers via the Drivers Off signal. The UVT comparator
has built-in hysteresis, with the lower threshold nominally set
to 6.2V. See Figure 3 and Figure 18.
When enabled, the V
current limited to a minimum of 19 mA (typically 22 mA). The
regulator’s output is split by a resistor divider to provide
separate VCC1 and VCC2 rails for the two controller chan-
nels. VCC1 powers Controller 1, drivers OUT1 and AC1,
Soft-start1, and all the support functions. VCC2 powers Con-
troller 2, drivers OUT2 and AC2, and Soft-start2. If VCC1
and/or VCC2 are used to power external circuitry, the current
limit specification applies to the sum of the load currents at
the two pins.
Splitting the V
allows separate external V
cross-talk between channels. Each VCC output pin requires
a capacitor to its corresponding ground for stability, as well
as to provide the surge currents to the external MOSFETs
via the gate driver outputs. The capacitors should be the
same value, and be physically close to their respective pins.
In most applications it is necessary to power V
external source as the average current required at the output
drivers may exceed the current capability of the internal
regulator and/or the thermal capability of the LM5034 pack-
age (see Figure 6). Normally the external source is derived
from the converter’s power stage once the LM5034 outputs
are active. Refer to the Applications Information section for
more information.
Drivers Off, V
Referring to Figure 18, Drivers Off and V
internal signals which, when active disable portions of the
LM5034. If the UVLO pin is below 1.25V, or if the thermal
shutdown activates, the V
disable the V
CC
CC
FIGURE 18. Drivers Off and V
under-voltage threshold circuit (UVT) monitors the
regulator and the UVLO circuit. The V
CC
CC
regulator. UVLO also activates the Drivers
regulator output through two 5Ω resistors
CC
CC
regulated output is 7.7V
CC
CC
CC
Disable
Disable line switches high to
voltage increases to
bypass capacitors to reduce
CC
Disable
CC
CC
Disable are
CC
±
20136820
regulator
PWR
4% with
from an
>
7.6V,
ex-

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