at90ls8535-8mi ATMEL Corporation, at90ls8535-8mi Datasheet - Page 55
at90ls8535-8mi
Manufacturer Part Number
at90ls8535-8mi
Description
8-bit Microcontroller With 8k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.AT90LS8535-8MI.pdf
(127 pages)
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1041H–11/01
Figure 38. SPI Master-slave Interconnection
The system is single-buffered in the transmit direction and double-buffered in the
receive direction. This means that bytes to be transmitted cannot be written to the SPI
Data Register before the entire shift cycle is completed. When receiving data, however,
a received byte must be read from the SPI Data Register before the next byte has been
completely shifted in. Otherwise, the first byte is lost.
When the SPI is enabled, the data direction of the MOSI, MISO, SCK and SS pins is
overridden according to Table 22.
Table 22. SPI Pin Overrides
Note:
MOSI
MISO
SCK
Pin
SS
See “Alternate Functions of Port B” on page 79 f
define the direction of the user-defined SPI pins.
CLOCK GENERATOR
MSB
8 BIT SHIFT REGISTER
Direction, Master SPI
User Defined
Input
User Defined
User Defined
SPI
MASTER
LSB
V
MISO
MOSI
SCK
SS
CC
MISO
MOSI
SCK
SS
Direction, Slave SPI
Input
User Defined
Input
Input
MSB
8 BIT SHIFT REGISTER
or a detailed description of how to
AT90S/LS8535
MASTER
LSB
55
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