at90ls8535-8mi ATMEL Corporation, at90ls8535-8mi Datasheet - Page 72
at90ls8535-8mi
Manufacturer Part Number
at90ls8535-8mi
Description
8-bit Microcontroller With 8k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.AT90LS8535-8MI.pdf
(127 pages)
- Current page: 72 of 127
- Download datasheet (3Mb)
ADC Multiplexer Select
Register – ADMUX
ADC Control and Status
Register – ADCSR
72
AT90S/LS8535
2. Enter Idle Mode. The ADC will start a conversion once the CPU has been halted.
3. If no other interrupts occur before the ADC conversion completes, the ADC inter-
• Bits 7..3 – Res: Reserved Bits
These bits are reserved bits in the AT90S8535 and always read as zero.
• Bits 2..0 – MUX2..MUX0: Analog Channel Select Bits 2-0
The value of these three bits selects which analog input ADC7..0 is connected to the
ADC. See Table 27 for details.
If these bits are changed during a conversion, the change will not go into effect until this
conversion is complete (ADIF in ADCSR is set).
Table 27. Input Channel Selections
• Bit 7 – ADEN: ADC Enable
Writing a logical “1” to this bit enables the ADC. By clearing this bit to zero, the ADC is
turned off. Turning the ADC off while a conversion is in progress will terminate this
conversion.
• Bit 6 – ADSC: ADC Start Conversion
In Single Conversion Mode, a logical “1” must be written to this bit to start each conver-
sion. In Free Running Mode, a logical “1” must be written to this bit to start the first
conversion. The first time ADSC has been written after the ADC has been enabled or if
ADSC is written at the same time as the ADC is enabled, an extended conversion will
precede the initiated conversion. This extended conversion performs initialization of the
ADC.
Bit
$07 ($27)
Read/Write
Initial Value
Bit
$06 ($26)
Read/Write
Initial Value
MUX2.0
000
001
010
011
100
101
110
111
rupt will wake up the MCU and execute the ADC Conversion Complete Interrupt
routine.
ADEN
R/W
R
7
–
0
7
0
ADSC
R/W
R
6
–
0
6
0
Single-ended Input
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ADFR
R/W
R
5
–
0
5
0
ADIF
R/W
R
4
–
0
4
0
ADIE
R/W
R
3
–
0
3
0
ADPS2
MUX2
R/W
R/W
2
0
2
0
ADPS1
MUX1
R/W
R/W
1
0
1
0
ADPS0
MUX0
R/W
R/W
0
0
0
0
1041H–11/01
ADMUX
ADCSR
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