p87c51mc2 NXP Semiconductors, p87c51mc2 Datasheet - Page 14

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p87c51mc2

Manufacturer Part Number
p87c51mc2
Description
80c51 8-bit Microcontroller Family With Extended Memory
Manufacturer
NXP Semiconductors
Datasheet

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DATA RAM
The P87C51MB2 and P87C51MC2 have 2 Kbytes and 3 K bytes of on-chip RAM respectively. Usages of the different data
segments are described in the 51MX Architecture Reference.
Table 2: On-Chip Data Memory Usage.
PORT 4
The P87C51Mx2 has a fifth I/O port (Port 4) that is shared with the second UART pins (RXD1 and TXD1) and two of the SPI pins
(MISO and SS). This port is also bit addressable and can be accessed in the same manner as any other ports, except that the
associated SFR is in the extended SFR space. Accesses to this SFR space is the same as those to the conventional SFR space
except that the instructions must be preceeded by an escape code (A5h), as described in the 51MX Architecture Reference.
LOW POWER MODES
The P87C51Mx2 supports the standard 51MX low power modes - Stop Clock Mode, Idle Mode and Power-Down Mode.
The PCON register is the same as the standard 51MX PCON register. Note that bits PCON.7 and PCON.6 are for UART
configurations (see section "UARTs").
ONCE™ MODE
The ONCE (“On-Circuit Emulation”) Mode facilitates testing and debugging of systems without the device having to be removed
from the circuit. It is supported in the P87C51Mx2.
PERIPHERALS
The P87C51Mx2 peripherals are described in more detail in the User Manual. The on-chip peripherals include:
• Timers:
• Two enhanced UARTs with an independent Baud Rate Generator - The section "UARTs" provides information regarding the
• Serial Peripheral Interface (SPI). Note: The SPI shares pins with the UART 1 shares the RXD1 and TXD1 with the SPI pins.
• Watchdog Timer.
• Programmable Counter Array (PCA).
2001 Apr 06
Philips Semiconductors
80C51 8-bit microcontroller family with extended memory
64KB/96KB OTP with 2KB/3KB RAM
- Timers 0 and 1.
- Timer 2.
two UARTs.
The SPEN (SPCTL.6) bit must be set to ’1’ to enable SPI operation.
Note: When Timer 1 or Timer 2 can only be used as a baud rate generator for UART 0, but not for UART 1.
Note: UART 1 shares the RXD1 and TXD1 with the SPI pins. The SPEN (SPCTL.6) bit must be cleared ’0’ (reset value) to
enable UART 1 operation.
EDATA
XDATA
IDATA
DATA
Type
memory that can be addressed directly and indirectly
memory that can be addressed indirectly (where direct address is for SFR
only)
memory that can only be addressed indirectly
memory (on-chip "External Data") that is accessed using the MOVX
instructions
Data Memory
Description
14
P87C51MB2/P87C51MC2
Total
P87C51MB2
1024
2048
128
128
768
Size (in Bytes)
Preliminary specification
P87C51MC2
1024
1792
3072
128
128

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