p89c538nbb NXP Semiconductors, p89c538nbb Datasheet - Page 5

• Manufacturer Part Number: p89c538nbb
• Description: Cmos Single-chip 8-bit Microcontrollers With Flash Program Memory
• Manufacturer: NXP Semiconductors

Philips Semiconductors
PIN DESCRIPTIONS
NOTE:
To avoid “latch-up” effect at power-on, the voltage on any pin at any time must not be higher than V
1998 Apr 24
V
V
P0.0–0.7
P1.0–P1.7
P2.0–P2.7
P3.0–P3.7
RST
ALE/PROG
PSEN
EA/V
XTAL1
XTAL2
MNEMONIC
SS
CC
80C51 8-bit microcontroller family
16K/64K/512 FLASH
PP
23, 44
43–36
24–31
13–19
PIN NUMBER
1, 22
LCC
2–9
11,
13
14
15
16
17
18
19
10
33
32
35
21
20
11
2
3
40–44,
16, 39
17, 38
37–30
18–25
7–13
QFP
1–3
40
41
10
12
13
27
26
29
15
14
11
5,
5
7
8
9
4
TYPE NAME AND FUNCTION
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
Ground: 0V reference.
Power Supply: This is the power supply voltage for normal, idle, and power-down operation.
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to them float
and can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address and
data bus during accesses to external program and data memory. In this application, it uses strong
internal pull-ups when emitting 1s. Port 0 also outputs the code bytes during program verification and
received code bytes during EEPROM programming. External pull-ups are required during program
verification.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s written
to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 1 pins that
are externally pulled low will source current because of the internal pull-ups. (See DC Electrical
Characteristics: I
verification.
Alternate functions for Port 1 include:
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s written
to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 2 pins that
are externally being pulled low will source current because of the internal pull-ups. (See DC
Electrical Characteristics: I
program memory and during accesses to external data memory that use 16-bit addresses (MOVX
@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. Some Port 2 pins
receive the high order address bits during EEPROM programming and verification.
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s written
to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 3 pins that
are externally being pulled low will source current because of the pull-ups. (See DC Electrical
Characteristics: I
Reset: A high on this pin for two machine cycles while the oscillator is running, resets the device. An
internal diffused resistor to V
Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the address
during an access to external memory. In normal operation, ALE is emitted at a constant rate of 1/6
the oscillator frequency, and can be used for external timing or clocking. Note that one ALE pulse is
skipped during each access to external data memory. This pin is also the program pulse input
(PROG) during EEPROM programming.
Program Store Enable: The read strobe to external program memory. When the processor is
executing code from the external program memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each access to external data memory. PSEN is
not activated during fetches from internal program memory.
External Access Enable/Programming Supply Voltage: EA must be externally held low to enable
the device to fetch code from external program memory. If EA is held high, the device executes from
internal program memory. This pin also receives the 12V programming supply voltage (V
EPROM programming. EA is internally latched on Reset.
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits.
Crystal 2: Output from the inverting oscillator amplifier.
T2 (P1.0): Timer/Counter 2 external count input
T2EX (P1.1): Timer/Counter 2 Reload/Capture
RxD (P3.0): Serial input port
TxD (P3.1): Serial output port
INT0 (P3.2): External interrupt
INT1 (P3.3): External interrupt
T0 (P3.4): Timer 0 external input
T1 (P3.5): Timer 1 external input
WR (P3.6): External data memory write strobe
RD (P3.7): External data memory read strobe
IL
IL
). Port 1 also receives the low-order address byte during program memory
). Port 3 also serves the special features of the 80C51 family, as listed below:
IL
). Port 2 emits the high-order address byte during fetches from external
SS
5
permits a power-on reset using only an external capacitor to V
CC
+ 0.5V or V
89C536/89C538
SS
– 0.5V, respectively.
Preliminary specification
PP
) during
CC
.