xrt83l30 Exar Corporation, xrt83l30 Datasheet - Page 49

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xrt83l30

Manufacturer Part Number
xrt83l30
Description
Xrt83l30 -single-channel T1/e1/j1 Long-haul, Short-haul Line Interface Unit
Manufacturer
Exar Corporation
Datasheet

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REV. 1.0.1
R
EGISTER
00001
B
D7
D6
D5
D4
IT
A
#
DDRESS
SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TERSEL1
TERSEL0
RXTSEL
TXTSEL
N
AME
T
ABLE
19: M
Receiver Termination Select: In Host mode, this bit is used to
select between the internal and external line termination modes
for the receiver according to the following table:
Transmit Termination Select: In Host mode, this bit is used to
select between the internal and external line termination modes
for the transmitter according to the following table:
Termination Impedance Select bit 1:
In the Host mode and in the internal termination mode (TXT-
SEL=”1” and RXTSEL=”1”), TERSEL[1:0] control the transmit
and receive termination impedance according to the following
table:
In the internal termination mode, the receiver termination of each
receiver is realized completely by internal resistors or by the
combination of internal and one fixed resistor (see description for
RXRES[1:0] bits).
In the internal termination mode, the transmitter output should be
AC coupled to the transformer.
Termination Impedance Select bit 0:
See description of bit D5 for the function of this bit.
ICROPROCESSOR
TERSEL1
RXTSEL
TXTSEL
0
0
1
1
0
1
0
1
46
R
EGISTER
TERSEL0
F
UNCTION
0
1
0
1
RX Termination
TX Termination
External
External
Internal
Internal
#1
BIT DESCRIPTION
Termination
100Ω
110Ω
120Ω
75Ω
R
EGISTER
T
XRT83L30
R/W
R/W
R/W
R/W
YPE
R
V
ALUE
ESET
0
0
0
0

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