xrt83l30 Exar Corporation, xrt83l30 Datasheet - Page 9
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xrt83l30
Manufacturer Part Number
xrt83l30
Description
Xrt83l30 -single-channel T1/e1/j1 Long-haul, Short-haul Line Interface Unit
Manufacturer
Exar Corporation
Datasheet
1.XRT83L30.pdf
(78 pages)
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RECEIVER
REV. 1.0.1
S
IGNAL
RXMUTE
RCLKE
RDATA
RRING
RNEG
RPOS
RLOS
RCLK
RTIP
LCV
N
AME
SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
P
63
64
50
53
IN
1
2
4
5
#
T
YPE
O
O
O
O
I
I
I
I
Receiver Loss of Signal
This signal is asserted ‘High’ for at least one RCLK cycle to indicate loss of
signal at the receive input.
Receiver Clock Output
Receiver Negative Data Output
In dual-rail mode, this signal is the receiver negative-rail output data.
Line Code Violation Output
In single-rail mode, this signal goes ‘High’ for one RCLK cycle to indicate a
code violation is detected in the received data. If AMI coding is selected,
every bipolar violation received will cause this pin to go “High”.
Receiver Positive Data Output
In dual-rail mode, this signal is the receive positive-rail output data sent to the
Framer.
Receiver NRZ Data Output
In single-rail mode, this signal is the receive NRZ format output data sent to
the Framer.
Receiver Differential Tip Positive Input
Positive differential receive input from the line.
Receiver Differential Ring Negative Input
Negative differential receive input from the line.
Receive Muting
In Hardware mode, connect this pin ‘High’ to mute RPOS and RNEG outputs
to a “Low” state upon receipt of LOS condition to prevent data chattering.
Connect this pin to ‘Low’ to disable muting function.
N
Receive Clock Edge
In Hardware mode, with this pin set to ‘High’ the output receive data is
updated on the falling edge of RCLK. With this pin tied ‘Low’, output data is
updated on the rising edge of RCLK.
N
OTE
OTE
: Internally pulled "Low" with 50kΩ resistor.
: Internally pulled “Low” with a 50kΩ resistor.
6
D
ESCRIPTION
XRT83L30