ak5700 AKM Semiconductor, Inc., ak5700 Datasheet - Page 26

• Manufacturer Part Number: ak5700
• Description: 16-bit ?? Mono Adc With Pll & Mic-amp
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
When PMPLL bit is “0”, the AK5700 becomes EXT mode. Master clock is input from MCKI pin, the internal PLL circuit
is not operated. This mode is compatible with I/F of the normal audio CODEC. The clocks required to operate are MCKI
(256fs, 512fs or 1024fs), EXLRCK (fs) and EXBCLK (≥32fs). The master clock (MCKI) should be synchronized with
EXLRCK. The phase between these clocks does not matter. The input frequency of MCKI is selected by FS1-0 bits (see
Table 11).
The external clocks (MCKI, EXBCLK and EXLRCK) should always be present whenever the ADC is in operation
(PMADC bit = “1”). If these clocks are not provided, the AK5700 may draw excess current and it is not possible to
operate properly because utilizes dynamic refreshed logic internally. If the external clocks are not present, the ADC
should be in the power-down mode (PMADC bit = “0”).
MS0569-E-01
EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”)
Mode
0
1
2
3
Table 11. MCKI Frequency at EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”)
FS3-2 bits
Don’t care
Don’t care
Don’t care
Don’t care
AK5700
FS1 bit
MCKO
MCKI
EXBCLK
EXLRCK
SDTO
0
0
1
1
Figure 22. EXT Slave Mode
FS0 bit
256fs, 512fs or 1024fs
0
1
0
1
- 26 -
≥ 32fs
1fs
MCKI Input
Frequency
1024fs
256fs
512fs
256fs
MCLK
BCLK
LRCK
SDTI
DSP or μP
Sampling Frequency
7.35kHz ∼ 48kHz
7.35kHz ∼ 13kHz
7.35kHz ∼ 26kHz
7.35kHz ∼ 48kHz
Range
Default
[AK5700]
2006/12