ak4365vn AKM Semiconductor, Inc., ak4365vn Datasheet
ak4365vn
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The AK4365 is 20bit DAC with built-in PLL and Headphone Amplifier. The PLL input crystal frequency is matched to typical mobile phone clock frequencies. The AK4365 features an analog mixing circuit that allows easy interfacing in mobile phone and portable ...
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PLLVCC PLLGND MCKI PLL VCOC DVDD SDATA BICK Audio Interface LRCK SMODE RSTN CCLK Serial I/F CDTI CS DGND MS0110-E-01 MCKO MIN LIN MCLK MINR MINL LIN DACL DAC ATT (Lch) LINM DACM DAC ATT (Mono) DACR RINM DAC ATT ...
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... ASAHI KASEI n Ordering Guide AK4365VN -30 +85 C AKD4365 Evaluation board for AK4365 n Pin Layout CS 1 CDTI 2 CCLK 3 LRCK 4 BICK 5 SDATA 6 DVDD 7 MS0110-E-01 28pin QFN (0.5mm pitch) 21 HPGND 20 HPVCC 19 MUTET 18 VCOM Top View 17 VREF 16 AVDD 15 AGND - 3 - [AK4365] 2003/10 ...
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No. Pin Name I Control Data Chip Select Pin 2 CDTI I Control Data Input Pin 3 CCLK I Control Clock Input Pin L/R Clock Pin This clock determines which audio channel is currently being input on ...
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ASAHI KASEI (AGND, DGND, HPGND, PLLGND=0V; Note 1) Parameter Power Supplies Analog Digital PLL HP-AMP |AGND – HPGND| (Note 2) |AGND – DGND| (Note 2) |AGND – PLLGND| (Note 2) Input Current (any pins except for supplies) Analog Input Voltage ...
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ASAHI KASEI (Ta=25 C; AVDD=PLLVCC=DVDD=HPVCC=2.9V,AGND=PLLGND=DGND=HPGND=0V; fs=44.1kHz; EXT=1; BOOST OFF; Slave Mode; Signal Frequency =1kHz; Measurement band width=10Hz 20kHz; Load impedance is a serial connection with R =16 and Parameter DAC Resolution LINEIN: (LIN/RIN/MIN pins) Analog Input Characteristics ...
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ASAHI KASEI (Ta=25 C; AVDD, DVDD, PLLVCC, HPVCC=2.7 3.3V; fs=44.1kHz; De-emphasis = “OFF”) Parameter DAC Digital Filter: (Note 12) Passband -0.05dB (Note 13) -6.0dB Stopband (Note 13) Passband Ripple Stopband Attenuation Group Delay (Note 14) Group Delay Distortion DAC Digital ...
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ASAHI KASEI 0 -5 -10 -15 0.01 (Ta=25 C; AVDD, DVDD, PLLVCC = 2.7 3.3V) Parameter High-Level Input Voltage Low-Level Input Voltage Input Voltage at AC Coupling (Note 18) High-Level Output Voltage (Iout = -400 A) Low-Level Output Voltage (Iout ...
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ASAHI KASEI (Ta=25 C; AVDD, DVDD, PLLVCC = 2.7 3.3V: C Parameter Master Clock Timing Frequency (EXT= “0”) (EXT= “1”) Pulse Width Low (Note 19) Pulse Width High (Note 19) AC Pulse Width (Note 23) LRCK Frequency Duty Cycle: Slave ...
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ASAHI KASEI n Timing Diagram 1000pF MCKI Input MCKI tCLKH LRCK BICK tBCKH MCKO tH MS0110-E-01 Measurement Point 100k AGND AGND Figure 3. MCKI AC Coupling Timing 1/fCLK tCLKL 1/fs tBCK tBCKL tL dMCK=tH/(tH+tL) or tL/(tH+tL) Figure 4. Clock Timing ...
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LRCK tBLR BICK SDATA Figure 5. Serial Interface Timing (Slave Mode) LRCK tMBLR BICK SDATA Figure 6. Serial Interface Timing (Master mode) RSTN MS0110-E-01 tLRB tSDS tSDH tSDH tSDS tRST Figure 7. Power-down & Reset Timing - 11 - VIH ...
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CS tCSS CCLK CDTI CS CCLK CDTI A3 MS0110-E-01 tCCKL tCCKH tCDS tCDH D7 D6 Figure 8. WRITE Command Input Timing A2 A1 Figure 9. WRITE Data Input Timing - 12 - VIH VIL VIH VIL VIH D5 D4 VIL ...
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ASAHI KASEI n System Clock 1) PLL mode (EXT bit = “0”) A fully integrated analog phase locked loop (PLL) generates a clock that is selected by PLL2-0 and FS2-0 bits (refer to Table 1 and Table 2). MCKO output ...
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Table 3. MCKO frequency (PLL mode, MCKO bit = “1”) Power Up (DAC bit = “1”) MCKI pin Refer to Table 1 MCKO pin MCKO bit = “0”: “L” MCKO bit = “1”: Output BICK pin BF bit = “1”: ...
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ASAHI KASEI Mode FS2 Table 6. Relationship between Sampling Frequency and MCKI Frequency (EXT mode) Table 7. MCKO frequency (EXT mode, MCKO bit = “1) Power Up (DAC bit = “1”) MCKI ...
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ASAHI KASEI n Serial Data Interface The AK4365 interfaces with external system by using SDATA, BICK and LRCK pins. Four data formats are available and are selected by setting DIF0 and DIF1 bits. Mode 0 is compatible with existing 16bit ...
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ASAHI KASEI Lch LRCK BICK SDATA 16bit SDATA 18bit SDATA 20bit Lch LRCK BICK SDATA 16bit SDATA 18bit SDATA 20bit ...
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ASAHI KASEI n Serial Control Interface Internal registers may be written to via the 3-wire µP interface pins (CS, CCLK and CDTI). The data on this interface consists of Control data (MSB first, 8bits) and Register address (MSB first, 8bits). ...
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ASAHI KASEI n Register Map Addr Register Name 80H PLL Mode & Timer 81H Mode Control 85H Power Management MINR 88H Output Select 1 89H HP-Amp Rch ATT ATTR7 8BH HP-Amp Lch ATT ATTL7 8DH MOUT ATT ATTM7 8FH Mode ...
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ASAHI KASEI Addr Register Name 81H Mode Control Default BST1-0: Select Low Frequency Boost Function BST1 BST0 Table 13. Select Low Frequency Boost MMUTE: The output data from DACM is soft-muted. 0: ...
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Addr Register Name 85H Power Management Default DAC: Power management for DACL, DACR, DACM and PLL. When this bit changes from “0” to “1”, DAC is powered-up to the current register values (ATT value, sampling rate, etc). 0: Power OFF ...
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Addr Register Name 88H Output Select 1 Default DACL: Select an output path of DACL 0: OFF (Default DACR: Select an output path of DACR 0: OFF (Default DACM: Select an output path of DACM 0: ...
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ASAHI KASEI Addr Register Name 89H HP-Amp Rch ATT ATTR7 8BH HP-Amp Lch ATT ATTL7 8DH MOUT ATT ATTM7 Default ATTR7-0: Setting of the attenuation value of output signal from DACR ATTL7-0: Setting of the attenuation value of output signal ...
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Addr Register Name 8FH Mode Control 2 Default EXT: Master Clock Mode Select 0: PLL mode 1: EXT mode (External clock mode) LRP: LRCK Polarity (enable at slave mode) 0: Normal 1: Invert CKP: BICK Polarity (enable at slave mode) ...
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ASAHI KASEI n Soft Mute Soft mute operation is performed in the digital domain. When LRMUTE or MMUTE bit go to “1”, the output signal is attenuated by - (“0”) via the cycle set by TM1-0 bit (Table 12). When ...
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ASAHI KASEI n Low Frequency Boost Function By controlling BST1-0 bits, the low frequency boost signal can be output from DACL, DACR and DACM. The setting value is common in DACL, DACR and DACM. Table 18 shows the relationship of ...
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ASAHI KASEI -10 -15 -20 0. -10 -15 -20 0.01 MS0110-E-01 0.10 1.00 Frequency [kHz] Figure 16. C=220 fs=44.1kHz 0.10 1.00 Frequency [kHz] Figure 17. C=100 F, R ...
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ASAHI KASEI -10 -15 -20 0.01 Figure 18. C=100 6.8 , fs=44.1kHz -10 -15 -20 0.01 MS0110-E-01 0.10 1.00 Frequency [kHz] 0.10 1.00 Frequency[kHz] Figure 19. C= 6.8 ...
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ASAHI KASEI -10 -15 -20 0. -10 -15 -20 0.01 MS0110-E-01 0.10 1.00 Frequency[kHz] Figure 20. C=100 fs=44.1kHz 0.10 1.00 Frequency[kHz] Figure 21. C= ...
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ASAHI KASEI n Polarity and gain of Line Input/Output The input signal from LIN, RIN and MIN pins are gained to +6dB by headphone amplifier. The input signal from LIN, RIN and MIN pins are inverted by headphone amplifier. The ...
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ASAHI KASEI n Power ON/OFF Sequence 1) In case of DAC output (Full-scale output) to HPL, HPR and MOUT pins (LIN, RIN and MIN: No input) DVDD AVDD, PLLVCC, HPVCC RSTN pin DAC,HPL HPR,MOUT bit Clock IN <Case 1> 00H ...
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ASAHI KASEI * necessary to shorten the MUTE sequence time, an external mute circuit should be implemented. An example of an external mute circuit is shown in the AK4365 evaluation board manual. The external mute circuit should ...
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ASAHI KASEI 2) In case of output from LIN, RIN and MIN pins (Full-scale output) to HPL, HPR and MOUT pins (DAC Power OFF) DVDD AVDD, PLLVCC, HPVCC RSTN pin HPL,HPR MOUT bit HPL,HPR pin (3) MOUT pin (1) Rise ...
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ASAHI KASEI Figure 26 shows the system connection diagram. An evaluation board [AKD4365] is available which demonstrates the optimum layout, power supply arrangements and measurement results. Capacitance values of VCOC pin PLL Frequency: 19.8MHz, 19.68MHz, 19.2MHz, 15.36MHz, 14.4MHz, 12MHz, 11.2896MHz ...
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ASAHI KASEI Note: The headphone amplifier output for the AK4365 may oscillate. This oscillation is caused by the load of a headphone cable. The following external circuit should be used to avoid this oscillation. 1) Resistor ( ...
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ASAHI KASEI 1. Grounding and Power Supply Coupling The AK4365 requires careful attention to power supply and grounding arrangements. AVDD is usually supplied from the analog power supply in the system and DVDD is supplied from AVDD via a 10 ...
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ASAHI KASEI 28pin QFN (Unit: mm) 5.2 ± 0.20 5.0 ± 0. 0.22 ± 0.05 Note: The black parts of back package should be open. n Package & Lead frame material Package molding compound: Epoxy Lead ...
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ASAHI KASEI These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. AKM assumes no liability ...