xr16m670 Exar Corporation, xr16m670 Datasheet - Page 32

• Manufacturer Part Number: xr16m670
• Description: 1.62v To 3.63v High Performance Uart With 32-byte Fifo
• Manufacturer: Exar Corporation

XR16M670
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 32-BYTE FIFO
MCR[1]: RTS# Output
The RTS# pin is a modem control output and may be used for automatic hardware flow control by enabled by
EFR bit-6. If the modem interface is not used, this output may be used as a general purpose output.
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MCR[2]: Reserved
OP1# is not available as an output pin on the M670. But it is available for use during Internal Loopback Mode.
In the Loopback Mode, this bit is used to write the state of the modem RI# interface signal.
MCR[3]: INT Output Enable
Enable or disable INT outputs to become active or in three-state. This bit is also used to control the OP2#
signal during internal loopback mode.
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MCR[4]: Internal Loopback Enable
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MCR[5]: Xon-Any Enable (requires EFR bit-4 = 1)
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MCR[6]: Infrared Encoder/Decoder Enable (requires EFR bit-4 = 1)
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MCR[7]: Clock Prescaler Select (requires EFR bit-4 = 1)
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Logic 0 = Force RTS# output HIGH (default).
Logic 1 = Force RTS# output LOW. It is required to start Auto RTS Flow Control.
Logic 0 = INT output disabled (three state) in the 16 mode (default). During internal loopback mode, OP2# is
HIGH.
Logic 1 = INT output enabled (active) in the 16 mode. During internal loopback mode, OP2# is LOW.
Logic 0 = Disable loopback mode (default).
Logic 1 = Enable local loopback mode, see loopback section and
Logic 0 = Disable Xon-Any function (for 16C550 compatibility, default).
Logic 1 = Enable Xon-Any function. In this mode, any RX character received will resume transmit operation.
The RX character will be loaded into the RX FIFO , unless the RX character is an Xon or Xoff character and
the M670 is programmed to use the Xon/Xoff flow control.
Logic 0 = Enable the standard modem receive and transmit input/output interface. (Default)
Logic 1 = Enable infrared IrDA receive and transmit inputs/outputs. The TX/RX output/input are routed to the
infrared encoder/decoder. The data input and output levels conform to the IrDA infrared interface
requirement. The RX FIFO may need to be flushed upon enable. While in this mode, the infrared TX output
will be LOW during idle data conditions.
Logic 0 = Divide by one. The input clock from the crystal or external clock is fed directly to the Programmable
Baud Rate Generator without further modification, i.e., divide by one (default).
Logic 1 = Divide by four. The prescaler divides the input clock from the crystal or external clock by four and
feeds it to the Programmable Baud Rate Generator, hence, data rates become one forth.
MCR
B
IT
0
1
-3
T
ABLE
11: INT O
INT O
UTPUT
Three-State
32
Active
UTPUT
I
N
16 M
M
ODES
ODE
Figure
14.
REV. 1.0.0