wm8940gefl-v Wolfson Microelectronics plc, wm8940gefl-v Datasheet - Page 20

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wm8940gefl-v

Manufacturer Part Number
wm8940gefl-v
Description
Mono Codec With Speaker Driver
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8940
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INPUT PGA VOLUME CONTROL
Table 4 Input PGA Volume Control
AUXILIARY INPUT
Figure 7 Auxiliary Input Circuit
The input microphone PGA has a gain range from -12dB to +35.25dB in 0.75dB steps. The gain
from the MICN input to the PGA output and from the AUX amplifier to the PGA output are always
common and controlled by the register bits INPPGAVOL[5:0]. These register bits also affect the
MICP pin when MICP2INPPGA=1.
When the Automatic Level Control (ALC) is enabled the input PGA gain is then controlled
automatically and the INPPGAVOL bits should not be used.
An auxiliary input circuit (Figure 7) is provided which consists of an amplifier which can be configured
either as an inverting buffer for a single input signal or as a mixer/summer for multiple inputs with the
use of external resistors. The circuit is enabled by the register bit AUXEN.
R45
Input PGA
volume
control
R32
ALC control 1
REGISTER
ADDRESS
7
6
5:0
8
BIT
INPPGAZC
INPPGAMUTE
INPPGAVOL
ALCSEL
LABEL
0
1
010000
0
DEFAULT
Input PGA zero cross enable:
0=Update gain when gain register changes
1=Update gain on 1
register write.
Mute control for input PGA:
0=Input PGA not muted, normal operation
1=Input PGA muted (and disconnected from
the following input BOOST stage).
Input PGA volume
000000 = -12dB
000001 = -11.25db
.
010000 = 0dB
.
111111 = 35.25dB
ALC function select:
0=ALC off (PGA gain set by INPPGAVOL
register bits)
1=ALC on (ALC controls PGA gain)
DESCRIPTION
st
PD, Rev 4.2, April 2008
zero cross after gain
Production Data
20

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