ox16c954 ETC-unknow, ox16c954 Datasheet - Page 29

• Manufacturer Part Number: ox16c954
• Description: High Performance Quad Uart With 128-byte Fifos Intel / Motorola Bus Interface
• Manufacturer: ETC-unknow

In this mode, the receiver and transmitter interrupts are
fully operational. The modem control interrupts are also
operational, but the interrupt sources are now the lower
four bits of the Modem Control Register instead of the four
modem status inputs. The interrupts are still controlled by
the IER.
MCR[5]: Enable XON-Any in Enhanced mode or enable
out-of-band flow control in non-Enhanced mode
650/950 (enhanced) modes:
logic 0
logic 1
In enhanced mode (EFR[4]=1), this bit enables the Xon-
Any operation. When Xon-Any is enabled, any received
data will be accepted as a valid XON (see in-band flow
control, section 13.3).
750 (normal) mode:
logic 0
logic 1
In non-enhanced mode, this bit enables the CTS/RTS out-
of-band flow control.
MCR[6]: IrDA mode
logic 0
logic 1
This function is only available in Enhanced mode. It
requires a 16x clock to function correctly.
MCR[7]: Baud rate prescaler select
logic 0
logic 1
where M & N are programmed in CPR (ICR offset 0x01).
After a hardware reset, CPR defaults to 0x20 (divide-by-4)
and MCR[7] is reset. User writes to this flag will only take
effect in Enhanced mode. See section 13.1.
Data Sheet Revision 1.0
OXFORD SEMICONDUCTOR LTD.
XON-Any is disabled.
XON-Any is enabled.
CTS/RTS flow control disabled.
CTS/RTS flow control enabled.
Standard serial receiver and transmitter data
format.
Data will be transmitted and received in IrDA
format.
Normal (divide by 1) baud rate generator
prescaler selected.
Divide-by-“M+N/8”
prescaler selected.
baud
rate
generator
11.2 Modem Status Register ‘MSR’
MSR[0]: Delta CTS#
Indicates that the CTS# input has changed since the last
time the MSR was read.
MSR[1]: Delta DSR#
Indicates that the DSR# input has changed since the last
time the MSR was read.
MSR[2]: Trailing edge RI#
Indicates that the RI# input has changed from low to high
since the last time the MSR was read.
MSR[3]: Delta DCD#
Indicates that the DCD# input has changed since the last
time the MSR was read.
MSR[4]: CTS
This bit is the complement of the CTS# input. It is
equivalent to RTS (MCR[1]) in internal loop-back mode.
MSR[5]: DSR
This bit is the complement of the DSR# input. It is
equivalent to DTR (MCR[0]) in internal loop-back mode.
MSR[6]: RI
This bit is the complement of the RI# input. In internal loop-
back mode it is equivalent to the internal OUT1.
MSR[7]: DCD
This bit is the complement of the DCD# input. In internal
loop-back mode it is equivalent to the internal OUT2.
OX16C954 rev B
Page 29