ox16c954 ETC-unknow, ox16c954 Datasheet - Page 36

• Manufacturer Part Number: ox16c954
• Description: High Performance Quad Uart With 128-byte Fifos Intel / Motorola Bus Interface
• Manufacturer: ETC-unknow

14.4 Input Clock Options
A system clock must be applied to XTLI pin on the device.
The speed of this clock determines the maximum baud rate
at which the device can receive and transmit serial data.
This maximum is equal to one sixteenth of the frequency of
the system clock (Increasing to one quarter of this value if
TCR=4 is used)
The industry standard system clock for PC COM ports is
1.8432 MHz, limiting the maximum baud rate to 115.2
Kbps. The OX16C95x UARTs support system clocks up to
60MHz (at 5V) and its flexible baud rate generation
hardware means that almost any frequency can be
optionally scaled down for compatibility with standard
devices.
Designers have the option of using either TTL clock
modules or crystal oscillator circuits for system clock input,
with minimal additional components. The following two
sections describe how each can be connected.
14.5 TTL Clock Mode
Using a TTL module for the system clock simply requires
the module to be supplied with power and GND
connections. The clock output can then be connected
directly to XTLI. XTLO should be left unconnected.
14.6 External 1x Clock Mode
The transmitter and receiver can accept an external clock
applied to the RI# and DSR# pins respectively. The clock
options are selected using the CKS register (see section
15.8). The transmitter and receiver may be configured to
operate in 1x (i.e. Isochronous mode) by setting CKS[7]
and CKS[3], respectively. In Isochronous mode, transmitter
or receiver will use the 1x clock (usually, but not
necessarily, an external source) where asynchronous
Data Sheet Revision 1.0
OXFORD SEMICONDUCTOR LTD.
Figure 2: TTL Clock Module Connectivity
CLOCK
VDD
XTLI
framing is maintained using start, parity and stop-bits.
However serial transmission and reception is synchronised
to the 1x clock. In this mode asynchronous data may be
transmitted at baud rates up to 60Mbps. The local 1x clock
source can be asserted on the DTR# pin.
Note that line drivers need to be capable of transmission at
data rates twice the system clock used (as one cycle of the
system clock corresponds to 1 bit of serial data). Also note
that enabling modem interrupts is illegal in isochronous
mode, as the clock signal will cause a continuous change
to the modem status (unless masked in MDM register, see
section 15.10).
14.7 Crystal Oscillator Circuit
The OX16C954 may be clocked by a crystal connected to
XTLI and XTLO or directly from a clock source connected
to the XTLI pin (or CLKSEL if selected by software). The
circuit required to use the on-chip oscillator is shown in
Figure 3.
Note: For better stability use a smaller value of R
Increase R
The total capacitive load (C1 in series with C2) should be
that specified by the crystal manufacturer (nominally 16pF).
Frequency
1.8432 - 8
Range
(MHz)
8-60
XTLO
XTLI
1
Figure 3: Crystal Oscillator Circuit
to reduce power consumption.
Table 19: Component values
33-68
(pF)
C
68
1
33 – 68
C
R
2
1
22
(pF)
R
2
220k-2M2
OX16C954 rev B
R
220k
1
( )
C
C
2
1
Page 36
R
470R
470R
2
( )
1
.