ak4563a AKM Semiconductor, Inc., ak4563a Datasheet
ak4563a
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ak4563a Summary of contents
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... ALC (Automatic Level Control) circuit, therefore is suitable for microphone application and etc. As the ALC circuit can be stopped by controlling P, IPGA can also be used as the manual volume. Digital I/F can be input/output from 1.5V to 3.0V by external power supply. The AK4563A can be powered-down by each block, therefore the AK4563A is suitable to low power dissipation in system. ...
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... RIN INTL1 IPGA1 INTR1 LOUT ROUT VCOM VREF VA AGND MS0067-E-02 ADC0 HPF HPF ADC1 DAC De-emp Control Register I/F CSN CCLK CDTI CDTO Figure 1. AK4563A Block Diagram - 2 - [AK4563A] LRCK BCLK Audio I/F SDTO0 Controller SDTO1 SDTI VD VT DGND PDN Clock Divider MCLK 2004/12 ...
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... ASAHI KASEI „ Ordering Guide AK4563AVF -20 AKD4563A Evaluation board for AK4563A „ Pin Layout LOUT 1 ROUT 2 INTL1 3 INTR1 4 INTL0 5 6 INTR0 EXTL 7 EXTR 8 LIN 9 RIN 10 VCOM 11 AGND VREF 14 MS0067-E-02 +85 C 28pin VSOP (0.65mm pitch AK4563A 23 Top 22 View 21 20 ...
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... Control Data Input Pin 26 CSN I Chip Select Pin 27 CCLK I Control Data Clock Pin PDN I Power Down & Reset Pin, “L”: Power Down & Reset, “H”: Normal Operation 28 Note: All digital input pins should not be left floating. MS0067-E-02 PIN / FUNCTION Function 3.0V 3.0V 3. [AK4563A] 2004/12 ...
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... AKM assumes no responsibility for the usage beyond the conditions in this datasheet. MS0067-E-02 ABSOLUATE MAXIMUM RATING Symbol min VA -0.3 VD -0.3 VT -0.3 GND IIN VINA -0.3 VIND -0.3 Ta -20 Tstg -65 Symbol min VA 2.3 VD 2.3 or VA-0.3 VT 1.5 VREF - - 5 - [AK4563A] max Units 4.6 V 4 VA+0.3 V VT+0 150 C typ max Units 2.5 3 ...
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... Note 9. All digital input pins except for PDN pin are held VT or DGND, and PDN pin is held DGND. MS0067-E-02 ANALOG CHARACTERISTICS min 1.35 6.5 80 LINE 0.1 +6dB -30dB 0.1 -30dB -38dB 0.1 -38dB -54dB - -54dB -62dB - -62dB -74dB (Note 1. [AK4563A] typ max Units 1.5 1.65 Vpp 10 14.5 k 125 176 0 Bits 100 dB ...
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... 21.8 - 23 24 CHARACTERISTICS 3.0V) Symbol min VIH 80 VT VIL - VOH VT-0.4 VOL - Iin - - 7 - [AK4563A] max Units 18.9 kHz - kHz - kHz kHz 21.7 kHz - kHz kHz 0. 1/ 0.5 dB typ max Units - - ...
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... For example, when tCCK=200ns - 8 - [AK4563A] typ max Units 12.288 12.8 MHz ns ns 18.432 19.2 MHz kHz tBLKL- ...
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... CCLK CDTI CDTO Figure 3. WRITE/READ Command Input Timing CSN CCLK CDTI D4 CDTO MS0067-E-02 tBLR tBLKH tDLR D15 (MSB) tSDS tSDH LSB tCCKL tCCKH tCDH tCDS op0 op1 op2 Hi-Z tCSH Hi-Z Figure 4. WRITE Data Input Timing - 9 - [AK4563A] 50%VT tBLKL 50%VT tDSS 50%VT 50%VT 50%VT 50%VT A0 50%VT tCSW 50%VT 50%VT 50%VT 2004/12 ...
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... Figure 7. Reset Timing - 10 - [AK4563A] 50%VT 50%VT 50%VT 50%VT ...
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... All external clocks (MCLK, BCLK and LRCK) should always be present whenever ADC or DAC is in operation. If these clocks are not provided, the AK4563A may draw excess current and it is not possible to operate properly because utilizes dynamic refreshed logic internally. If the external clocks are not present, the AK4563A should be in the power-down mode. „ ...
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... If the analog signal does not be input, the digital outputs have the op-amp of input and some noise in ADC. (3) ADC data is “0” data at power-down. (4) A few noise occurs at the “ the system application. (5) When the external clocks are stopped, the AK4563A should be in the power-down mode (PDN pin = “L” or PM5-0 bit = “0”) . MS0067-E-02 4128/fs ...
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... Figure 10. Audio Data Timing (No. [AK4563A] BCLK Figure RESET 32fs Figure 9 = 64fs Figure 10 ...
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... Don’t Care Lch Data Figure 12. Audio Data Timing (No. [AK4563A ...
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... Control data Figure 13. Control Data Timing - 15 - [AK4563A ...
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... ZELMN FR 0 IPGA6 IPGA5 IPGA4 PHL6 PHL5 PHL4 PHR6 PHR5 PHR4 R [AK4563A LINE EXT INT1 INT0 PM3 PM2 PM1 PM0 DIF1 DIF0 DEM1 DEM0 WTM1 WTM0 LTM1 LTM0 FDATT RATT1 RATT0 LMTH REF3 ...
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... OFF ON 0 Lch PM2 ADC1 ADC0 0 OFF OFF 1 OFF ON 0 Lch Table 3. ADC power control 2ch Mode (PM3-2 = “01”) 4ch Mode (PM3-2 = “11” [AK4563A PM3 PM2 PM1 PM0 RESET RESET 2004/12 ...
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... Gain 1. PM5-0 bits can be partially powered-down by ON/OFF (“1”/ “0”) of PM5-0 bits. When PDN pin goes “L”, all the circuit in AK4563A can be powered-down regardless of PM5-0 bits. When the AK4563A is powered-down by PM5-0 bits, contents of registers are kept. ...
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... PM3-2 IPGA0 ADC0 ALC IPGA1 Lch Lch ADC1 ALC PM1-0 PM3-2 IPGA0 ADC0 ALC IPGA1 ADC1 ALC PM5 PM1-0 IPGA0 ALC Figure 15. Power Management - 19 - [AK4563A] PM4 MUX AMP PM4 MUX DAC AMP MUX AMP PM4 MUX DAC AMP MUX AMP 2004/12 ...
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... R/W RESET DEM1-0: Select De-emphasis frequency The AK4563A includes the digital de-emphasis filter (tc = 50/ IIR filter. The filter corresponds to three sampling frequencies (32kHz, 44,1kHz and 48kHz). The de-emphasis filter selected by DEM0 and DEM0 bits are enabled for input audio data. DIF1-0: Select Audio Serial Interface Format (AK4516A compatible) No ...
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... Table 6. ALC Limiter Operation Period WTM1 WTM0 Period 0 0 8ms 0 1 16ms 1 0 64ms 1 1 512ms ZTM1 ZTM0 Period 0 0 8ms 0 1 16ms 1 0 64ms 1 1 512ms Table 8. Zero Crossing Timeout - 21 - [AK4563A WTM1 WTM0 LTM1 LTM0 RESET RESET RESET 2004/12 ...
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... When IPGA of each L/R channel do zero crossing or timeout independently, the IPGA value is changed. These period are value at fs=32kHz (FS bit = “0”) or fs=48kHz (FS bit = “1”). MS0067-E-02 FDTM1 FDTM0 Period 0 0 24ms 0 1 32ms 1 0 48ms 1 1 64ms Table 9. FADEIN/OUT Period - 22 - [AK4563A] RESET 2004/12 ...
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... Table 11. ALC Recovery GAIN Step FDATT ATT Step RESET LMAT1 LMAT0 ATT Step Table 13. ALC Limiter ATT Step - 23 - [AK4563A FDATT RATT1 RATT0 LMTH RESET -6.0dB -4.0dB RESET RESET 2004/12 ...
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... Table 14. Setting Reference Value at ALC Recovery Operation MS0067-E- REF6 REF5 REF4 R/W 0 GAIN(dB) Step MIC LINE +28.0 +6.0 +27.5 +5.5 +27.0 +5.0 0.5dB +0.0 -22.0 -0.5 -22.5 -7.5 -29.5 -8.0 -30.0 -9.0 -31.0 -10.0 -32.0 1dB -15.0 -37.0 -16.0 -38.0 -18.0 -40.0 -20.0 -42.0 2dB -38.0 -60.0 -40.0 -62.0 -44.0 -66.0 4dB -48.0 -70.0 -52.0 -74.0 MUTE MUTE - 24 - [AK4563A REF3 REF2 REF1 REF0 28H Level 2004/12 ...
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... ALC operation. Zero crossing timeout is the same as the ALC recovery operation. In case of ZELMN = “1”, the IPGA value is changed immediately. MS0067-E- ZELM R [AK4563A STAT FDIN FDOUT ALC RD R 2004/12 ...
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... There is not LINE table in IPGA1 IPGA value is reset at PM1-0 = “00”. MS0067-E- IPGA6 IPGA5 IPGA4 R/W 0 GAIN(dB) Step MIC LINE +28.0 +6.0 +27.5 +5.5 +27.0 +5.0 0.5dB +0.0 -22.0 -0.5 -22.5 -7.5 -29.5 -8.0 -30.0 -9.0 -31.0 -10.0 -32.0 1dB -15.0 -37.0 -16.0 -38.0 -18.0 -40.0 -20.0 -42.0 2dB -38.0 -60.0 -40.0 -62.0 -44.0 -66.0 4dB -48.0 -70.0 -52.0 -74.0 MUTE MUTE Table 15. Input Gain Setting - 26 - [AK4563A IPGA3 IPGA2 IPGA1 IPGA0 28H Level 2004/12 ...
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... When the number of IPGA channels is changed, PM1-0 bits should be done via “00”. If PM1-0 bits are not done via “00”, there is a possibility that gain between IPGA0 and IPGA1 is different. However, powered-up all channels become the same gain when IPGA value is written at ALC disabled state (ALC bit = “0”) or the ALC Limiter/Recovery operation is done. MS0067-E- [AK4563A] 2004/12 ...
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... PDN pin = “L” - PM2 = PM3 = “0” MS0067-E- PHL6 PHL5 PHL4 PHR6 PHR5 PHR4 RD 00H Peak Level [dB log [(Data+1) / 256)] 10 Peak Level -0.034 dB -0.068dB -0.102dB -42.14dB -48.16dB (infinity [AK4563A PHL3 PHL2 PHL1 PHL0 PHR3 PHR2 PHR1 PHR0 2004/12 ...
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... Limiter Detection Level(LMTH) (1) 2dB Recovery Waiting Counter Reset Level (LMTH) Figure 16. Disable ALC zero crossing detection (ZELMN = “1”) (1) When the signal is input between 2dB, the AK4563A does not operate the ALC limiter and recovery. MS0067-E-02 FUNCTION DETAIL Limiter Update Period (LTM1- ...
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... Zero crossing timeout is set by ZTM1-0 bits. But the first zero crossing timeout cycle after starting the limiter operation may be the short cycle by the state of the last zero crossing counter. (For example, in case of doing the limiter operation during the recovery operation) MS0067-E-02 (1) (2) (2) (1) (3) Zero crossing timeout (ZTM1- [AK4563A] ATT level (LMAT1-0) ATT level (LMAT1-0) 2004/12 ...
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... MS0067-E-02 Input Signal < ALC limiter detection level (LMTH)” (1) WTM counter starts ZTM counter starts (2) WTM counter starts ZTM counter starts WTM counter starts - 31 - [AK4563A] Limiter detection level (LMTH) Recovery waiting counter reset level (LMTH) Zero crossing detect (2) 2004/12 ...
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... ZTM1-0 bit, the ALC recovery is operated by the zero crossing timeout period of ZTM1-0 bit. Therefore, in this case the auto recovery operation period is not constant. MS0067-E-02 Figure 19. The ALC Recovery Operation - 32 - [AK4563A] Gain Level (RATT1-0) 2004/12 ...
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... Figure 20. Registers set-up sequence at ALC operation MS0067-E-02 Manual-Mode WR (LMAT1-0, RATT, LMTH) WR (REF6-0) * The value of IPGA should be the WR (IPGA6-0) same or smaller than REF’s. WR (ALC= “1”, ZELMN) ALC Operation Finish ALC mode? Yes WR (ALC= “0”) RD (STAT) STAT = “1”? Yes - 33 - [AK4563A] 2004/12 ...
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... WR (ALC = FDIN = “1”): The FADEIN operation starts. The IPGA changes from the MUTE state to the FADEIN operation. (4) The FADEIN operation is done until the limiter detection level (LMTH) or the reference level (REF6-0). After completing the FADEIN operation, the AK4563A becomes the ALC operation. (5) FADEIN time can be set by FDTM1-0 and FDATT bits E.g. FDTM1-0 = 32ms, FDATT = 1step (96 x FDTM1-0) / FDATT = 96 x 32ms / ...
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... WR (IPGA): The IPGA value changes the initial value (exiting MUTE state). (7) WR (ALC = “1”, FDOUT = “0”): The ALC operation restarts. But the ALC bit should not write until completing zero crossing operation of IPGA. (8) Release a mute function of analog and digital outputs externally. MS0067-E-02 (2) (1) (3) (4) (5) ( [AK4563A] (7) (8) 2004/12 ...
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... Analog Supply 10 14 Note: - AGND and DGND of AK4563A should be distributed separately from the ground of external controller etc. - When LOUT/ROUT drives some capacitive load, some resistor should be added in series between LOUT/ROUT and capacitive load. MS0067-E-02 SYSTEM DESIGN LOUT PDN ...
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... The DC offset including ADC own DC offset removed by the internal HPF (fc=3.7Hz@fs=48kHz). The AK4563A samples the analog inputs at 64fs. The digital filter rejects noise above the stopband except for multiples of 64fs. The AK4563A includes an anti-aliasing filter (RC filter) to attenuate a noise around 64fs. ...
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... ASAHI KASEI 28pin VSOP (Unit: mm) 9.8 0.2 0.65 +0.10 0.22 -0.05 0.12 M *1: Dimension does not include mold flash. „ Material & Lead finish Package molding compound: Lead frame material: Lead frame surface treatment: MS0067-E-02 PACKAGE 15 14 0.08 Epoxy Cu Solder plate (Pb free [AK4563A 0.5 0.2 7.6 0.2 2004/12 ...
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... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS0067-E-02 MARKING AKM AK4563AVF XXXBYYYYC XXXBYYYYC data code identifier XXXB : Lot number (X : Digit number Alpha character) YYYYC : Assembly date (Y : Digit number, C Alpha character) IMPORTANT NOTICE - 39 - [AK4563A] 2004/12 ...