ak4563a AKM Semiconductor, Inc., ak4563a Datasheet - Page 16

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ak4563a

Manufacturer Part Number
ak4563a
Description
Low Power 16bit 4ch Adc & 2ch Dac With Alc
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
„ Register Map
„ Register Definitions
The following condition can not read and write all registers.
MS0067-E-02
* PDN pin = “L”
Addr
Addr
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
00H
INT0: Select ON/OFF of INTL0 and INTR0 (0: OFF, 1: ON)
INT1: Select ON/OFF of INTL1 and INTR1 (0: OFF, 1: ON)
EXT: Select ON/OFF of EXTL and EXTR (0: OFF, 1: ON)
LINE: Select ON/OFF of LIN and RIN (0:OFF, 1:ON)
When LINE bit is “1”, INT0, INT1 and EXT bits are ignored.
Gain tables of IPGA0 and IPGA1 are changed by LINE bit.
When LINE bit is “1”, gain table of IPGA becomes LINE side. But IPGA1 becomes mute state because it does not
have a LINE table.
When INT0 and EXT bits change into “1” at the same time, input signals are mixed by Gain 0dB.
Input Select
Power Management
Mode Control
Timer Select
ALC Mode Control 1
ALC Mode Control 2
Operation Mode
Input PGA Control
Peak Hold Lch
Peak Hold Rch
Register Name
Input Select
RESET
Register Name
R/W
FDTM1
PHL7
PHR7
D7
D7
0
0
0
0
0
0
0
0
0
FDTM0
IPGA6
PHL6
PHR6
REF6
D6
D6
0
0
0
0
0
0
0
- 16 -
LMAT1
ZELMN
IPGA5
ZTM1
PHL5
PHR5
REF5
PM5
D5
D5
0
0
0
0
LMAT0
IPGA4
ZTM0
PHL4
PHR4
REF4
PM4
D4
FR
D4
FS
0
0
0
R/W
FDATT
WTM1
IPGA3
STAT
PHL3
PHR3
LINE
REF3
LINE
DIF1
PM3
D3
D3
0
RATT1
WTM0
IPGA2
PHL2
PHR2
REF2
FDIN
DIF0
EXT
PM2
EXT
D2
D2
0
RATT0
FDOUT
IPGA1
DEM1
LTM1
PHL1
PHR1
REF1
INT1
INT1
PM1
D1
D1
1
[AK4563A]
LMTH
IPGA0
2004/12
DEM0
LTM0
PHL0
PHR0
REF0
INT0
INT0
PM0
ALC
D0
D0
1

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