ak4117 AKM Semiconductor, Inc., ak4117 Datasheet - Page 11

• Manufacturer Part Number: ak4117
• Description: Low Power 192khz Digital Audio Receiver
• Manufacturer: AKM Semiconductor, Inc.

XCKS1
ASAHI KASEI
The AK4117 has a master clock output pin, MCKO. In PLL mode, PCKS1-0 bits select the MCKO frequency as shown
in Table 2. When MCKO=512fs, MCKO goes to “L” when fs=96kHz and 192kHz. When MCKO=256fs, MCKO goes to
“L” when fs=192kHz. When LP bit is set to “1”, the AK4117 is in low power mode (default). In low power mode, PLL
lock range is up to 48kHz and the MCKO frequency is fixed to 256fs.
In the X’tal mode, XCKS1-0 bits select the ratio of the X’tal frequency to fs (sampling frequency). The DIV bit selects
the ratio (x1 or x1/2) of the MCKO frequency to the X’tal frequency (Table 3).
MS0157-E-03
Master Clock Output
0
0
1
1
XCKS0
0
1
0
1
LP
0
1
1024fs
128fs
256fs
512fs
X’tal
EXT
or
DIV=0
1024fs
128fs
256fs
512fs
(X’tal mode: Clock operation mode 1, 2(UNLCK=1), 3)
PCKS1
(PLL mode: Clock operation mode 0, 2(UNLCK=0))
MCKO
0
0
1
1
x
Table 2. Master Clock Frequency Select
Table 3. Master Clock Frequency Select
DIV=1
128fs
256fs
512fs
64fs
PCKS0
2.048
N/A
N/A
16
0
1
0
1
x
8
EXTCLK [MHz]
- 11 -
4.096
N/A
32
16
8
MCKO
512fs
256fs
128fs
256fs
N/A
8.192
64
32
16
8
fs [kHz]
11.2896
88.2
44.1
N/A
N/A
32 ∼ 192
fs [kHz]
32 ∼ 48
32 ∼ 96
32 ∼ 48
N/A
X’tal [MHz]
12.288
N/A
N/A
96
48
Default
24.576
N/A
192
96
48
[AK4117]
2004/04
Default