at52br3224a ATMEL Corporation, at52br3224a Datasheet - Page 25

• Manufacturer Part Number: at52br3224a
• Description: At52br3224a 32-megabit Flash + 4-megabit/ 8-megabit Sram Stack Memory
• Manufacturer: ATMEL Corporation

Program Cycle Characteristics
Program Cycle Waveforms
Sector or Chip Erase Cycle Waveforms
Notes:
3338B–STKD–6/03
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BP
AS
AH
DS
DH
WP
WPH
WC
RP
EC
SEC1
SEC2
ES
PS
1. OE must be high only when WE and CE are both low.
2. For chip erase, the address should be 555. For sector erase, the address depends on what sector is to be erased.
3. For chip erase, the data should be 10H, and for sector erase, the data should be 30H.
(See note 3 under “Command Definitions in Hex” on page 14.)
Parameter
Word Programming Time
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Write Pulse Width
Write Pulse Width High
Write Cycle Time
Reset Pulse Width
Chip Erase Cycle Time
Sector Erase Cycle Time (4K Word Sectors)
Sector Erase Cycle Time (32K Word Sectors)
Erase Suspend Time
Program Suspend Time
A0-A20
DATA
WE
OE
CE
A0 - A20
(1)
DATA
WE
OE
CE
t
AS
t
AS
555
t
WC
WORD 0
t
AH
AA
555
t
WC
t
AH
t
t
DS
WP
AA
AAA
t
t
DS
WP
WORD 1
t
DH
AAA
55
t
DH
55
555
t
WPH
WORD 2
555
80
PROGRAM CYCLE
t
WPH
A0
555
WORD 3
ADDRESS
AA
INPUT
DATA
AT52BR3224A(T)/3228A(T)
AAA
WORD 4
55
t
Min
BP
500
35
35
35
70
Note 2
35
0
0
WORD 5
Note 3
555
t
EC
AA
Typ
0.3
1.2
15
80
Max
150
400
3.0
5.0
15
20
seconds
seconds
seconds
Units
µs
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
25