u3745bm ATMEL Corporation, u3745bm Datasheet - Page 16

• Manufacturer Part Number: u3745bm
• Description: Receiver
• Manufacturer: ATMEL Corporation

Figure 13. Synchronization of the Demodulator Output
Figure 14. Debouncing of the Demodulator Output
Figure 15. Steady L State Limited DATA Output Pattern after Transmission
Switching the Receiver Back
to Sleep Mode
16
Dem_out
DATA
DATA
Clock Bit check
Dem_out
counter
Bit check
Enable IC
Dem_out
DATA
U3745BM
Sleep Mode
Lim_min £ CV_Lim < Lim_max
t
T
ee
XClk
After the end of a data transmission, the receiver remains active and random noise
pulses appear at pin DATA. The edge-to-edge time period t
noise pulses is equal to or slightly higher than T
The receiver can be set back to polling mode via pin DATA or via pin ENABLE.
When using pin DATA, this pin must be pulled to Low for the period t1 by the connected
microcontroller. Figure 16 illustrates the timing of the OFF command (see also Figure
20). The minimum value of t1 depends on the BR_Range. The maximum value for t1 is
not limited but it is recommended not to exceed the specified value to prevent erasing
the reset marker. This item is explained in more detail in the section “Configuration of
the Receiver”. Setting the receiver to sleep mode via DATA is achieved by programming
bit 1 of the OPMODE register to 1. Only one sync pulse (t3) is issued.
The duration of the OFF command is determined by the sum of t1, t2 and t10. After the
OFF command, the sleep time T
is limited. The resulting time constant t together with an optional external pull-up resistor
may not be exceeded to ensure proper operation.
If the receiver is set to polling mode via pin ENABLE, an ‘L’ pulse (T
at that pin. Figure 17 illustrates the timing of that command. After the positive edge of
Bit check Mode
t ee
tmin1
CV_Lim < Lim_min or CV_Lim ³ Lim_max
Receiving Mode
t
ee
Sleep
elapses. Note that the capacitive load at Pin DATA
tmin2
DATA_min
tmin2
t
DATA_L_max
.
ee
of the majority of these
Doze
) must be issued
4663A–RKE–06/03