u3745bm ATMEL Corporation, u3745bm Datasheet - Page 17

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u3745bm

Manufacturer Part Number
u3745bm
Description
Receiver
Manufacturer
ATMEL Corporation
Datasheet

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Figure 16. Timing Diagram of the OFF Command Via Pin DATA
Figure 17. Timing Diagram of the OFF Command Via Pin ENABLE
Configuration of the
Receiver
4663A–RKE–06/03
DATA (U3745BM)
Serial bi-directional
data line
Out1 (mC)
DATA (U3745BM)
ENABLE
Serial bi-directional
data line
Receiver
on
X
X
X
X
Receiver on
t1
this pulse, the sleep time T
ENABLE is held to ‘L’. If the receiver is polled exclusively by a microcontroller, T
be programmed to 0 to enable a instantaneous response time. This command is the
faster option than via pin DATA at the cost of an additional connection to the
microcontroller.
The U3745BM receiver is configured via two 12-bit RAM registers called OPMODE and
LIMIT. The registers can be programmed by means of the bi-directional DATA port. If
the register contents have changed due to a voltage drop, this condition is indicated by a
certain output pattern called reset marker (RM). The receiver must be reprogrammed in
that case. After a power-on reset (POR), the registers are set to default mode. If the
receiver is operated in default mode, there is no need to program the registers.
Table 3 shows the structure of the registers. According to Table 2, bit 1 defines if the
receiver is set back to polling mode via the OFF command, (see section “Receiving
Mode”) or if it is programmed. Bit 2 represents the register address. It selects the appro-
priate register to be programmed.
OFF Command
t2
toff
T
Doze
t3
(Start bit)
t4
Bit 1
("1")
t10
t5
t7
Sleep
T
Sleep
elapses. The receiver remains in sleep mode as long as
T
Sleep
Startup mode
X
X
U3745BM
Startup mode
X
X
Sleep
can
17

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