k4x51163pc Samsung Semiconductor, Inc., k4x51163pc Datasheet - Page 13

• Manufacturer Part Number: k4x51163pc
• Description: 32m X16 Mobile-ddr Sdram
• Manufacturer: Samsung Semiconductor, Inc.

K4X51163PC - L(F)E/G
AC Timming Parameters & Specifications
Clock cycle time
Row cycle time
Row active time
RAS to CAS delay
Row precharge time
Row active to Row active delay
Write recovery time
Last data in to Active delay
Last data in to Read command
Col. address to Col. address delay
Clock high level width
Clock low level width
DQ Output data access time from CK/
CK
DQS Output data access time from
CK/CK
Data strobe edge to ouput data edge
Read Preamble
Read Postamble
CK to valid DQS-in
DQS-in setup time
DQS-in hold time
DQS-in high level width
DQS-in low level width
DQS falling edge to CK setup time
DQS falling edge hold time from CK
DQS-in cycle time
Address and Control Input setup time
Address and Control Input hold time
Address & Control input pulse width
DQ & DM setup time to DQS
DQ & DM hold time to DQS
DQ & DM input pulse width
DQ & DQS low-impedence time from CK/CK
DQ & DQS high-impedence time from CK/CK
DQS write postamble time
DQS write preamble time
Parameter
CL=2
CL=3
CL=2
CL=3
CL=2
CL=3
CL=2
CL=3
tWPRES
tWPREH
tDQSCK
Symbol
tWPRE
tDQSQ
tDQSH
tWPST
tCDLR
tRPRE
tDQSS
tDQSL
tRPST
tDIPW
tRCD
tRRD
tCCD
tDSH
tDSC
tRAS
tDAL
tDSS
tIPW
tWR
tCK
tRC
tRP
tCH
tAC
tDS
tDH
tCL
tHZ
tLZ
tIS
tIH
2tCK+tRP
12.0
67.5
22.5
22.5
0.45
0.45
0.75
0.25
0.25
Min
7.5
0.5
0.9
0.4
0.4
0.4
0.2
0.2
0.9
1.3
1.3
2.6
0.8
0.8
1.8
1.0
0.4
45
15
15
1
1
2
2
2
2
0
DDR266
70,000
Max
0.55
0.55
1.25
0.6
1.1
1.1
0.6
0.6
0.6
1.1
6.0
0.6
8
6
8
6
2tCK+tRP
Mobile-DDR SDRAM
15.0
0.45
0.45
0.75
0.25
0.25
Min
9.0
2.5
2.5
2.5
2.5
0.5
0.9
0.4
0.4
0.4
0.2
0.2
0.9
1.5
1.5
3.0
1.1
1.1
2.4
1.0
0.4
81
54
27
27
15
15
1
1
0
DDR222
70,000
Max
0.55
0.55
1.25
0.7
1.1
1.1
0.6
0.6
0.6
1.1
7.0
0.6
8
6
8
6
February 2006
Unit
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
Note
5,6
5,6
2
3
4
1
1
1