SST45VF010-10-4C-SA SST [Silicon Storage Technology, Inc], SST45VF010-10-4C-SA Datasheet - Page 2

• Manufacturer Part Number: SST45VF010-10-4C-SA
• Description: 512 Kbit / 1 Mbit / 2 Mbit Serial Flash
• Manufacturer: SST [Silicon Storage Technology, Inc]

Reset
Reset will terminate any operation, e.g., Read, Erase
and Program, in progress. It is activated by a high to low
transition on the RESET# pin. The device will remain in
reset condition as long as RESET# is low. Minimum reset
time is 10µs. See Figure 14 for reset timing diagram.
RESET# is internally pulled-up and could remain uncon-
nected during normal operation. After reset, the device is
in standby mode, a high to low transition on CE# is
required to start the next operation.
An internal power-on reset circuit protects against acci-
dental data writes. Applying a logic level low to RESET#
during the power-on process then changing to a logic
level high when V
level will provide additional protection against accidental
writes during power on.
Read SST ID/Read Device ID
The Read SST ID and Read Device ID operations read
the JEDEC assigned manufacturer identification and the
manufacturer assigned device identification codes.
These codes may be used to determine the actual device
resident in the system.
© 2000 Silicon Storage Technology, Inc.
F
UNCTIONAL
B
LOCK
DD
Address
Latches
Buffers
D
has reached the correct voltage
and
IAGRAM
CE#
Control Logic
SCK
Serial Interface
X - Decoder
SI
SO
2
SST45VF512 / SST45VF010 / SST45VF020
WP# RESET#
Write Protect
The WP# pin provides inadvertent write protection. The
WP# pin must be held high for any Erase or Program
operation. The WP# pin is “don’t care” for all other
operations. In typical use, the WP# pin is connected to
V
driven high whenever an Erase or Program operation is
required. If the WP# pin is tied to V
resistor, then all operations may occur and the write
protection feature is disabled. The WP# pin has an
internal pull-up and could remain unconnected when not
used.
T
ABLE
SS
Manufacturer’s ID
Device ID
SST45VF512
SST45VF010
SST45VF020
512 Kbit / 1 Mbit / 2 Mbit Serial Flash
with a standard pull-down resistor. WP# is then
1: P
Data Latches
Y - Decoder
RODUCT
I/O Buffers
SuperFlash
Cell Array
and
I
DENTIFICATION
514ILL B1.0
0000 H
0001 H
0001 H
0001 H
Byte
Advance Information
S71178
DD
with a pull-up
BF H
Data
41 H
45 H
43 H
514 PGM T1.4
514-1 10/00