SST49LF040-33-4C-WH SST [Silicon Storage Technology, Inc], SST49LF040-33-4C-WH Datasheet - Page 24

• Manufacturer Part Number: SST49LF040-33-4C-WH
• Description: 4 Mbit LPC Flash
• Manufacturer: SST [Silicon Storage Technology, Inc]

©2001 Silicon Storage Technology, Inc.
LFRAME#
LAD[3:0]
FIGURE 12: P
RST# = V IH
RST# = V IH
RST# = V IH
CE#
LCLK
RST#
LFRAME#
LFRAME#
LFRAME#
CE# = V IL
CE# = V IL
CE# = V IL
LAD[3:0]
LAD[3:0]
LAD[3:0]
LCLK
LCLK
LCLK
Note 1: YYYYH must be within memory address range specified in Figures 4 and 5.
ROGRAM
2nd Start
1st Start
3rd Start
4th Start
1 Clock 1 Clock
1 Clock 1 Clock
0000b
0000b
0000b
0000b
C
1 Clock 1 Clock
1 Clock 1 Clock
YCLE
Memory
Memory
Memory
011Xb
011Xb
011Xb
Cycle
Write
Write
Cycle
011Xb
Cycle
Write
T
A[31:28] A[27:24]
A[31:28] A[27:24]
A[31:28] A[27:24]
A[31:28] A[27:24]
IMING
D
Write the 4th command (target locations to be programmed) to the device in LPC mode.
Load Address "YYYY 2AAAH" in 8 Clocks
Load Address "YYYY 5555H" in 8 Clocks
Load Address "YYYY 5555H" in 8 Clocks
IAGRAM
A[23:20] A[19:16]
A[23:20] A[19:16]
A[23:20] A[19:16]
A[23:20] A[19:16]
Load Ain in 8 Clocks
Write the 2nd command to the device in LPC mode.
Write the 1st command to the device in LPC mode.
Write the 3rd command to the device in LPC mode.
Address 1
Address 1
Address 1
Address 1
(LPC M
A[15:12]
0101b
0010b
0101b
24
ODE
A[11:8]
0101b
1010b
0101b
)
1010b
0101b
0101b
A[7:4]
1010b
0101b
A[3:0]
0101b
Load Data "A0H" in 2 Clocks
Load Data "AAH" in 2 Clocks
Load Data "55H" in 2 Clocks
Load Data in 2 Clocks
1010b
0101b
0000b
D[3:0]
Data
Data
Data
Data
1010b
1010b
0101b
D[7:4]
1111b
1111b
1111b
1111b
2 Clocks
2 Clocks
2 Clocks
2 Clocks
TAR
TAR
TAR
TAR
Tri-State
Tri-State
Tri-State
Tri-State
4 Mbit LPC Flash
1 Clock
1 Clock
1 Clock
0000b
0000b
0000b
0000b
Sync
1 Clock
Sync
Sync
Sync
Advance Information
SST49LF040
S71213-00-000 11/01 562
TAR
TAR
TAR
TAR
562 ILL F11.1
program start
program start
Command
Command
Command
Start next
Start next
Start next
Internal
1 Clock
1 Clock
1 Clock
Internal