act7000asc Aeroflex Circuit Technology, act7000asc Datasheet
act7000asc
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act7000asc Summary of contents
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Standard Products ACT 7000ASC 64-Bit Superscaler Microprocessor January 24, 2005 FEATURES Full militarized PMC-Sierra RM7000A ■ microprocessor Dual Issue symmetric superscalar ■ microprocessor with instruction prefetch optimized for system level price/performance 225, 300, 350 MHz operating frequency ● Consult Factory ...
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Secondary Tags Set A Primary Data Cache 4 - Way Set Associative Store Buffer Write Buffer Read Buffer D Bus Floating-Point Load / Align Floating-Point Register File Packer / Unpacker Comparator Floating-Point MultAdd, Add, Sub, Cvt, Div, Sqrt Multiplier Array ...
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DESCRIPTION The ACT 7000ASC is a highly integrated symmetric superscalar microprocessor capable of issuing two instructions each processor cycle. It has two high performance 64-bit integer units as well as a high throughput, fully pipelined 64-bit floating point unit. To ...
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Instruction Cache Dispatch Unit F Pipe IBus M Pipe IBus Pipe M Pipe Figure 2 – Instruction Issue Paradigm Figure simplification of the pipeline section and illustrates the basics of the instruction issue mechanism. ...
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Note that instruction dependencies, resource conflicts, and branches ...
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By pipelining the multiply-accumulate function and dynamically determining the size of the input operands, the ACT 7000ASC is able to maximize throughput while still using an area efficient implementation. Floating-Point Coprocessor The ACT 7000ASC incorporates a high-performance fully pipe-lined floating-point ...
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The memory management unit controls the virtual memory system page mapping. It consists of an instruction address translation buffer, or ITLB, a data address translation buffer, or DTLB, a Joint TLB, or JTLB, and coprocessor registers used by the virtual ...
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Figure 5 – Kernel Mode Virtual Addressing (32-bit mode) 0xFFFFFFFF Kernel virtual address space (kseg3) Mapped, 0.5GB 0xE0000000 0xDFFFFFFF Supervisor virtual address space (ksseg) Mapped, 0.5GB 0xC0000000 0xBFFFFFFF Uncached kernel physical address space (kseg1) Unmapped, 0.5GB 0xA0000000 0x9FFFFFFF Cached kernel ...
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Each primary cache has a 64-bit read path, a 128-bit write path, and both caches can be accessed simultaneously. The primary caches provide the integer and floating-point units with an ...
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If the cache lookup misses, then only main memory is written. 5. Write-back with secondary bypass. Loads and instruction fetches first search the primary ...
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Attribute Index vAddr Tag pAddr Write policy n.a. read policy n.a. read order critical word first write order NA miss restart following: complete line Parity per word Cache Locking The ACT 7000ASC allows critical code or data fragments to be ...
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SysClock and the pipeline clock, the ACT 7000ASC also allows half-integral multipliers, thereby providing greater granularity in the designers choice of pipeline and system interface frequencies. The interface consists of a 64-bit Address/Data bus with 8 check bits ...
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Figure 7 shows a processor block read request and the external agent read response for a system with a transaction. The read latency is 4 cycles (ValidOut* to ValidIn*), and the response data pattern is DDxxDD. Figure 9 shows a ...
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SysClock Addr SysAD SysCmd Write ValidOut* ValidIn* RdRdy* WrRdy* Release* Performance Counters Like the Test/Break-point capability described above, the Performance Counter feature has been added to improve the observability and controllability of the processor thereby easing system debug and, especially ...
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A watchdog interrupt can be used as an aid in debugging system or software “hangs.” Typically the software is setup to periodically update ...
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31..16 31..28 27..24 IPL7 IIPL6 31..28 27.. JTAG Interface The ACT 7000ASC interface supports JTAG boundary scan in conformance with IEEE 1149.1. The JTAG interface is especially helpful for checking the integrity ...
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Table 16 – Boot Time Mode Stream Mode bit Description Reserved: Must be zero 0 Write-back data rate 4..1 0: DDDD 1: DDxDDx 2: DDxxDDxx 3: DxDxDxDx 4: DDxxxDDxxx 5 DDxxxxDDxxxx 6: DxxDxxDxxDxx 7: DDxxxxxxDDxxxxxx 8: DxxxDxxxDxxxDxxx 9-15:Reserved SysClock to ...
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PLL Analog Power Filtering The ACT 7000ASC includes extra PLL Analog Power Fiiltering circuitry designed to provide low noise, temperature stable filtering for the VccP and VssP signals. The included circuitry consists of several passive components located at the closest ...
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Symbol V Terminal Voltage with respect to V TERM T Case Operating Temperature C T Storage Temperature STG I DC Input Current Output Current OUT Note 1: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may ...
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Parameter VccInt Standby Power (mWatts) Active Maximum with no FFU operation Maximum worst case instruction mix Notes 1. Worst case supply voltage (maximum V 2. Dhrystone 2.1 instruction mix. 3. I/O supply power is application dependent, but typically <20% of ...
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Sym Parameter 2,3 Data Output mode 14... mode 14... Data Setup t = see above table DS rise 4 t Data Hold t = see above table DH fall Notes: 1. Timings are measured from ...
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The following is a list of control, data, clock, interrupt, and miscellaneous pins of the ACT 7000ASC. Pin Name Type System interface: ExtRqst* Input Release* Output RdRdy* Input WrRdy* Input ValidIn* Input ValidOut* Output SysAD(63:0) Input/ Output SysADC(7:0) Input/ Output ...
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The following is a list of control, data, clock, interrupt, and miscellaneous pins of the ACT 7000ASC. Pin Name Type JTAG interface: JTDI Input JTCK Input JTDO Output JTMS Input Initialization Interface: BigEndian Input VccOK Input ColdReset* Input Reset* Input ...
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Package Information – "F17" – CQFP 208 Leads 1.131 (28.727) SQ 1.109 (28.169 1.009 (25.63) .9998 (25.37) 51 Spaces at .0197 (51 Spaces at .50) 1 Pin 1 Chamfer 208 .960 (24.384) SQ Detail "A" 1.331 (33.807) ...
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ACT 7000ASC Microprocessor CQFP Pinouts – "F17" & "F24" Pin # Function 1 VccIO VccIO 5 Vss 6 SysAD4 7 SysAD36 8 SysAD5 9 SysAD37 10 VccInt 11 Vss 12 SysAD6 13 SysAD38 14 VccIO ...
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Part Number ACT-7000ASC-300F17I ACT-7000ASC-300F17C ACT-7000ASC-300F17T ACT-7000ASC-300F17M ACT– 7000A SC – 225 F17 M Aeroflex-Plainview Aeroflex-Plainview Base Processor Type Base Processor Type Cache Style Cache Style SC = Secondary Cache Maximum Pipeline Freq. Maximum Pipeline Freq. 225 = 225MHz 225 = ...