act7000asc Aeroflex Circuit Technology, act7000asc Datasheet - Page 16

no-image

act7000asc

Manufacturer Part Number
act7000asc
Description
Standard Products Act7000asc 64-bit Superscaler Microprocessor
Manufacturer
Aeroflex Circuit Technology
Datasheet
JTAG Interface
especially helpful for checking the integrity of the processor’s pin connections.
Boot-Time Options
mode control interface is a serial interface operating at a very low frequency (SysClock divided by 256). The low
frequency operation allows the initialization information to be kept in a low cost EPROM; alternatively the twenty or so
bits could be generated by the system interface ASIC.
fundamental operational modes. ModeClock runs continuously from the assertion of VccOK.
Boot-Time Modes
deasserted; bit 255 is the last.
The ACT 7000ASC interface supports JTAG boundary scan in conformance with IEEE 1149.1. The JTAG interface is
Fundamental operational modes for the processor are initialized by the boot-time mode control interface. The boot-time
Immediately after the VccOK signal is asserted, the processor reads a serial bit stream of 256 bits to initialize all the
The boot-time serial mode stream is defined in Table 16. Bit 0 is the bit presented to the processor when VccOK is
SCD7000A Rev B
BD
31
30
0
31..28
31..28
IPL7
0
29,28
CE
27..24
27..24
IIPL6
31..16
0
0
Table 12 – Interupt Control Register
27
0
IPL13
23..20
23..20
IPL5
IM[15..8]
Table 13 – IPLLO Register
Table 14 – IPLHI Register
Table 11 – Cause Register
15..8
W2
26
IPL12
19..16
19..16
IPL4
W1
25
TE
16
7
IPL11
15..12
15..12
IPL3
24
IV
6..5
0
IPL10
IPL2
11..8
11..8
IP[15..0]
23..8
Spacing
4..00
IPL1
IPL9
7..4
7..4
7
0
IPL0
IPL8
3..0
3..0
EXC
6..2
0,1
0

Related parts for act7000asc