act7000asc Aeroflex Circuit Technology, act7000asc Datasheet - Page 3

• Manufacturer Part Number: act7000asc
• Description: Standard Products Act7000asc 64-bit Superscaler Microprocessor
• Manufacturer: Aeroflex Circuit Technology

DESCRIPTION
HARDWARE OVERVIEW
superscalar microprocessor capable of issuing two
instructions each processor cycle. It has two high
performance 64-bit integer units as well as a high
throughput, fully pipelined 64-bit floating point unit. To
keep its multiple execution units running efficiently, the
ACT 7000ASC integrates not only 16KB 4-way set
associative instruction and data caches but backs them up
with an integrated 256KB 4-way set associative secondary
as well. For maximum efficiency, the data and secondary
caches are writeback and nonblocking. A RM52XX family
compatible,
management unit with a 64/48-entry fully associative TLB
and a high-performance 64-bit system interface supporting
hardware prioritized and vectored interrupts round out the
main features of the processor.
embedded control applications such as: Avionics upgrades,
Unmanned
systems, Flight Computers, Digital Mapping Systems and
Smart Munitions. The multiply-accumulate operation is the
core primitive of almost all signal processing algorithms
allowing the ACT-7000ASC to eliminate the need for a
separate DSP engine in many embedded applications.
targeted at high-performance embedded applications. The
key elements of the ACT 7000ASC are briefly described
below.
The ACT 7000ASC is a highly integrated symmetric
The ACT-7000ASC is ideally suited for high end
The ACT 7000ASC offers a high-level of integration
SCD7000A Rev B
aerial/land/underwater
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General Purpose Registers
operating
system
r29
r30
r31
r1
r2
0
•
•
•
•
friendly
vehicle
0
Figure 1 – CP0 Registers
guidance
memory
3
CPU Registers
has a simple, clean user visible state consisting of 32
general purpose registers, or GPR’s, two special purpose
registers for integer multiplication and division, and a
program counter; there are no condition code bits. Figure 1
shows the user visible state.
Superscalar Dispatch
superscalar dispatch unit which allows it to issue up to two
instructions per cycle. For purposes of instruction issue, the
ACT 7000ASC defines four classes of instructions:
integer, load/store, branches, and floating-point. There are
two logical pipelines, the function, or F, pipeline and the
memory, or M, pipeline. Note however that the M pipe can
execute integer as well as memory type instructions.
illustrates the basics of the instruction issue mechanism.
integer, branch, floating-point,
Like all MIPS ISA processors, the ACT 7000ASC CPU
The
Figure 2 is a simplification of the pipeline section and
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63
63
integer mul, div
Multiply/Divide Registers
Table 1 – Instruction Issue Rules
ACT 7000ASC has an efficient symmetric
one of:
F Pipe
Program Counter
LO
PC
HI
integer, load/store
0
0
0
M Pipe
one of: