74AHC1G09GW,125 NXP Semiconductors, 74AHC1G09GW,125 Datasheet

IC 2-IN AND GATE O-D 5TSSOP

74AHC1G09GW,125

Manufacturer Part Number
74AHC1G09GW,125
Description
IC 2-IN AND GATE O-D 5TSSOP
Manufacturer
NXP Semiconductors
Series
74AHCr
Datasheet

Specifications of 74AHC1G09GW,125

Number Of Circuits
1
Package / Case
SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
Logic Type
AND Gate with Open Drain
Number Of Inputs
2
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
AND
Logic Family
AHC
Low Level Output Current
8 mA
Propagation Delay Time
3.2 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AHC1G09GW-G
74AHC1G09GW-G
935279914125

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AHC1G09GW,125
Manufacturer:
NXP Semiconductors
Quantity:
4 700
1. General description
2. Features
3. Ordering information
Table 1.
4. Marking
Table 2.
Type number
74AHC1G09GW
74AHC1G09GV
Type number
74AHC1G09GW
74AHC1G09GV
Ordering information
Marking
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
The 74AHC1G09 is a high-speed Si-gate CMOS device.
The 74AHC1G09 provides the 2-input AND function with open-drain output.
The output of the 74AHC1G09 is an open drain and can be connected to other open-drain
outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For
digital operation this device must have a pull-up resistor to establish a logic HIGH level.
74AHC1G09
2-input AND gate with open-drain output
Rev. 02 — 18 December 2007
High noise immunity
Low power dissipation
SOT353-1 and SOT753 package options
ESD protection:
Specified from 40 C to +85 C and from 40 C to +125 C.
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
TSSOP5
SC-74A
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
plastic surface-mounted package; 5 leads
Marking code
A9
A09
Product data sheet
Version
SOT353-1
SOT753

Related parts for 74AHC1G09GW,125

74AHC1G09GW,125 Summary of contents

Page 1

AND gate with open-drain output Rev. 02 — 18 December 2007 1. General description The 74AHC1G09 is a high-speed Si-gate CMOS device. The 74AHC1G09 provides the 2-input AND function with open-drain output. The output of the 74AHC1G09 is ...

Page 2

... NXP Semiconductors 5. Functional diagram 001aad598 Fig 1. Logic symbol 6. Pinning information 6.1 Pinning Fig 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) 6.2 Pin description Table 3. Pin description Symbol Pin GND Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level high-impedance OFF-state. ...

Page 3

... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O I input clamping current IK I output clamping current OK I output current ...

Page 4

... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level output voltage 4.0 mA 8.0 mA input leakage GND current 5 OFF-state output current GND supply current 5 input I capacitance 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit see ...

Page 5

... NXP Semiconductors 12. Waveforms A, B input Y output Measurement points are given the typical voltage output level that occur with the output load. OL Fig 5. The data input ( output (Y) propagation delays Table 9. Measurement points Input V M 0.5V CC GENERATOR Test data is given in Table 10. Definitions for test circuit Load capacitance including jig and probe capacitance ...

Page 6

... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT353-1 Fig 7 ...

Page 7

... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions UNIT 0.100 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT753 Fig 8. Package outline SOT753 (SC-74A) 74AHC1G09_2 Product data sheet scale 3.1 1.7 3.0 0.6 0.95 2.7 1.3 2 ...

Page 8

... Release date 74AHC1G09_2 20071218 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Package SOT753 added to • Quick reference data section removed. ...

Page 9

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 10

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 7 Functional description . . . . . . . . . . . . . . . . . . . 2 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 4 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6 14 Abbreviations ...

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