em65570sagh ELAN Microelectronics Corp, em65570sagh Datasheet - Page 33

• Manufacturer Part Number: em65570sagh
• Description: 68com/98seg 65k Color Stn Lcd Drivers
• Manufacturer: ELAN Microelectronics Corp

Product Specification (V1.0) 04.18.2006
(This specification is subject to change without further notice)
7.9 Display Data Structure and Gradation Control
7.10 Gradation LSB Control
7.11 Generation of the Alternate Signal (M)
For the purpose of gradation control, one pixel requires multiple bits of display RAM.
The EM65570S has 5-bit data per output to achieve the gradation display.
The three outputs of the segment driver are used for one pixel of RGB, and the
EM65570S is connected to an STN color LCD panel. It can display 98*68 pixels with
65K colors (5 bits * 6 bits [5+FRC] * 5 bits). In this case, since the gradation display
data is processed by a single access to the memory, the data can be rewritten fast and
naturally.
The weighting for each data bit is dependent on the status of the SWAP bit that is
selected when data is written to the display RAM.
In 256 color mode (C256=1), the EM65570S provides segment driver output for
8-gradation display using 3-bits and that for 4-gradation display using 2-bits.
The segment driver output for the 4-gradation display uses 2-bits written to the
corresponding RAM area and 1-bit supplemented by the gradation LSB circuit, and
then selects 4-gradation from 8-gradation.
In 256 color mode (C256=1), the segment driver output for the 4-gradation display
result in a gradation level of 0 regardless of the gradation LSB, when 2-bits of data on
the display RAM are “00”. When 2-bits of data on the display RAM is “11”,a gradation
level of 7/7 is selected regardless of the bit information of the gradation LSB. The other
gradation levels are selected depending on 2-bits of data on the display RAM and the
gradation LSB bits.
One bit of data is supplemented by setting the gradation LSB register (GLSB).
The Gradation LSB control bit applied to all 4-gradation segment drivers.
Gradation LSB = “0”: Selects 0 as the LSB information on the RAM for 4-gradation
segment drivers.
Gradation LSB = “1”: Selects 1 as the LSB information on the RAM for 4-gradation
segment drivers.
LCD alternated signal (M) is generated by the display clock (D_CK). The M generates
alternated drive waveform to the LCD drive circuit. Normally, the M generates
alternated drive waveform every frame (Frame-signal level is reversed every one
frame). However, by setting up data (n-1) in an n-line reverse register and n-line
alternated control bit (NLIN) at “1”, n-line reverse waveform is generated.
When NLIN = “H” :
EOR=0
EOR=1
M always reverses on the nth raster row regardless of whether the end of a
frame is reached.
M reverses at the nth raster row and restarts the raster row count at the start
of every frame.
68COM/98SEG 65K Color STN LCD Drivers
EM65570S
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