em65570sagh ELAN Microelectronics Corp, em65570sagh Datasheet - Page 42

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em65570sagh

Manufacturer Part Number
em65570sagh
Description
68com/98seg 65k Color Stn Lcd Drivers
Manufacturer
ELAN Microelectronics Corp
Datasheet
EM65570S
68COM/98SEG 65K Color STN LCD Drivers
36 x
7.19 OTP Function
(4) Clear
When ‘CLR’ control bit of Bank 2 [6H] is set to 1, this function will clear the window area
display defined by starting point (X1, Y1) and the ending point (X2, Y2). The Display
RAM contents of the window will be set to 0.
It should be noted that the needed clock numbers generated is the same as that in
equation (1)
EM65570S supports OTP function to tune (1) LCD operating voltage Vop. It can also
select OTP operating mode, and OTP power from internal or external. In OTP select
register (Bank5 [AH]), using (M1, M0) to select the operating mode for OTP, (M1,
M0)=00 o Read information from OTP; (M1, M0)=01 o Program information to OTP;
(M1, M0)=10 o Reserved; (M1, M0)=11 o OTP standby mode.
In program mode, the delay time needed is more than 1 ms.
Vop calibration offset voltage can be achieved by setting the Vop calibration offset
register (Bank 5 [BH & EH]).
VEV=K*(373+(DV+CV))
V0 = VEV * N
CV5~CV0
(M1, M0)
011111
011110
000001
000000
100000
100001
111111
00
01
10
11
OTP Operating Mode
Calibration Offset
Program
Reserve
Standby
Read
(This specification is subject to change without further notice)
K=4.005 * 10
N : RM register setting
+31
+30
-32
-31
+1
-1
0
Product Specification (V1.0) 04.18.2006
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