em65570sagh ELAN Microelectronics Corp, em65570sagh Datasheet - Page 83

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em65570sagh

Manufacturer Part Number
em65570sagh
Description
68com/98seg 65k Color Stn Lcd Drivers
Manufacturer
ELAN Microelectronics Corp
Datasheet
Product Specification (V1.0) 04.18.2006
(This specification is subject to change without further notice)
8.2.42 Line Reverse Start Address
(At the time of reset: {LS3, LS2, LS1, LS0} = 0H, read address: 4H)
(At the time of reset: {LS7, LS6, LS5, LS4} = 0H, read address: 5H)
The LS registers set to line reverse start address. Moreover, must keep following two
conditions.
(1)
(2)
8.2.43 Line Reverse End Address
(At the time of reset: {LE3, LE2, LE1, LE0} = 0H, read address: 6H)
(At the time of reset: {LE7, LE6, LE5, LE4} = 0H, read address: 7H)
The LE registers set to line reverse end address. Moreover, must keep following two
conditions.
(1)
(2)
8.2.44 Line Reverse Control
(At the time of reset: {EOR, BST, BT, LREV} = 0H, read address: 8H)
The EOR control n-line alternated drive.
EOR=0
EOR=1
– mark means “Don’t care”
– mark means “Don’t care”
– mark means “Don’t care”
D7 D6 D5 D4
D7 D6 D5 D4
D7 D6 D5 D4
D7
D7
0
0
1
0
0
00H
LS
00H
LS
1
1
D6
0
D6
1
1
0
0
M always reverses on the nth raster row regardless of whether the end of a
frame is reached.
M reverses at the nth raster row and restarts the raster row count at the start
of every frame.
0
D5
D5
1
LE LE: Line reverse end address
LE LS: Line reverse start address
1
LS
LS
0
1
0
D4
D4
1
0
LS3 LS2 LS1 LS0
LS7 LS6 LS5 LS4
EOR BST BT LREV
D3
D3
D3
43H
43H
LE7 LE6 LE5 LE4
LE3 LE2 LE1 LE0
D3
D3
D2
D2
D2
D2
D2
D1
D1
D1
D1
D1
D0
D0
D0
D0
D0
68COM/98SEG 65K Color STN LCD Drivers
CSB RS RDB WRB RE2 RE1 RE0
CSB RS RDB WRB RE2 RE1 RE0
CSB
0
0
CSB RS RDB WRB RE2 RE1 RE0
CSB
0
0
0
1
1
RS
RS
1
1
1
RDB WRB RE2 RE1 RE0
1
1
RDB WRB RE2 RE1 RE0
1
1
1
0
0
0
0
0
1
1
1
1
1
EM65570S
0
0
0
0
0
x 77
1
1
1
1
1

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