em65570sagh ELAN Microelectronics Corp, em65570sagh Datasheet - Page 80

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em65570sagh

Manufacturer Part Number
em65570sagh
Description
68com/98seg 65k Color Stn Lcd Drivers
Manufacturer
ELAN Microelectronics Corp
Datasheet
EM65570S
68COM/98SEG 65K Color STN LCD Drivers
74 x
The DV register has 7 bits, so can select 128 level voltage.
The output voltage at VEV is specified by equation (1).
VEV = K * (373+(DV+CV))-----------------------(1)
(K: 4.005 * 10
OTP)
VEV range form 1.5V to 2V at 25 qC
The LCD drive voltage V0 is determined by VEV level and RM register value equation
V0 = VEV * N --------------------------(2)
(N = RM register value)
In order to prevent transient voltage from generating when an electronic volume code is
set, the circuit design is such that the set value is not reflected as a level immediately
after only the upper bits (DV6-DV4) of the electronic code have been set. The set value
becomes valid when the lower bits (DV3-DV0) of the electronic control volume code
have also been set.
8.2.37 Internal Register Read Address
(At the time of reset: {RA3, RA2, RA1, RA0} = CH)
The RA register set to specify the address for register read operation. The EM65570S
has many registers and a register bank. Hence, a maximum of 4-steps are necessary
to read a specific register.
(1) Write 04H to RE register for access to RA register.
(2) Writes specific register address to RA register.
(3) Write specific register bank to RE register.
(4) Read specific contents.
D7
DV6
1
0
0
1
1
D6
When writing code to set the electronic volume register, set DV6~DV4 first, then set
DV3~DV0.
1
DV5
D5
0
0
1
1
0
-3
D4
temperature compensation coefficient, CV: Vop offset setting value of
0
DV4
0
0
1
1
RA3 RA2 RA1 RA0
D3
DV3
D2
0
0
1
1
j
j
D1
DV2
0
0
1
1
(This specification is subject to change without further notice)
D0
NOTE
DV1
0
0
1
1
CSB RS RDB WRB RE2 RE1 RE0
0
Product Specification (V1.0) 04.18.2006
DV0
0
1
0
1
1
1
Output Voltage
0
Smaller
Larger
j
j
j
j
1
0
0

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