em65570sagh ELAN Microelectronics Corp, em65570sagh Datasheet - Page 65

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em65570sagh

Manufacturer Part Number
em65570sagh
Description
68com/98seg 65k Color Stn Lcd Drivers
Manufacturer
ELAN Microelectronics Corp
Datasheet
" :
U
F O
F N
Product Specification (V1.0) 04.18.2006
(This specification is subject to change without further notice)
D S
J O
" &
F E
D F
F Y
" 9
D I
F B
Following shows address increment in window function access.
In each operation mode, the following increment operation is performed:
When gradation display mode and 8-bit access are selected
Address is incremented as described above.
When gradation display mode and 16-bit access are selected:
Accessing the RAM once accesses two bytes.
The X-addresses increment in the order of 00H,01H,…5FH,60H and 61H.
8.2.7 Power Control Register
(At the tine of reset: {AMPON, HALT, DCON, ACL}=0H, read address: BH)
ACL
The internal circuit can be initialized.
ACL = “0”: Normal operation
ACL = “1”: Initialization ON
When the reset operation begins internally after ACL register sets to “1”, the ACL
register is automatically cleared to “0”. The internal reset signal has been generated
with a clock (built-in oscillation circuit or CK input) for the display. Therefore, install the
WAIT period for the display clock two cycles at least. After WAIT period, next operation
can handle.
DCON
The internal booster circuit is set ON/OFF
DCON = “0”: Booster circuit OFF
DCON=”1”: Booster circuit ON
D7 D6 D5 D4
T
T
" 9
" :
1
F T
O
F T
8 I F
E S
E S
" E
" E
Transition of AX and AY Register
4 5 " 3 5
4 5 " 3 5
0
1
T
T
F T
F T
E S
E S
" E
" E
1
4 5 " 3 5
4 5 " 3 5
maxH: The internal maximum X-address in each access mode.
AMPON HALT DCON ACL
D3
D2
T
T
F T
F T
E S
E S
" E
" E
& / %
& / %
D1
68COM/98SEG 65K Color STN LCD Drivers
D0
NOTE
Transition of X and Y Address
CSB RS RDB WRB RE2 RE1 RE0
Same as AX and AY register
0
1
1
0
0
EM65570S
0
x 59
0

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