h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 187

• Manufacturer Part Number: h8s-2138
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

The above contention will not occur if an enable bit or interrupt source flag is cleared to 0 while
the interrupt is masked.
5.6.2
Instructions that disable interrupts are LDC, ANDC, ORC, and XORC. After any of these
instructions is executed, all interrupts, including NMI, are disabled, and the next instruction is
always executed. When the I bit or UI bit is set by one of these instructions, the new value
becomes valid two states after execution of the instruction ends.
5.6.3
Interrupt operation differs between the EEPMOV.B instruction and the EEPMOV.W instruction.
With the EEPMOV.B instruction, an interrupt request (including NMI) issued during the transfer
is not accepted until the move is completed.
With the EEPMOV.W instruction, if an interrupt request is issued during the transfer, interrupt
exception handling starts at a break in the transfer cycle. The PC value saved on the stack in this
case is the address of the next instruction.
Therefore, if an interrupt is generated during execution of an EEPMOV.W instruction, the
following coding should be used.
L1:
Instructions that Disable Interrupts
Interrupts during Execution of EEPMOV Instruction
EEPMOV.W
MOV.W
BNE
R4,R4
L1
Rev. 4.00 Jun 06, 2006 page 133 of 1004
Section 5 Interrupt Controller
REJ09B0301-0400