h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 517

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h8s-2138

Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
16.2.2
SAR is an 8-bit readable/writable register that stores the slave address and selects the
communication format. When the chip is in slave mode (and the addressing format is selected), if
the upper 7 bits of SAR match the upper 7 bits of the first frame received after a start condition,
the chip operates as the slave device specified by the master device. SAR is assigned to the same
address as ICMR, and can be written and read only when the ICE bit is cleared to 0 in ICCR.
SAR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 to 1—Slave Address (SVA6 to SVA0): Set a unique address in bits SVA6 to SVA0,
differing from the addresses of other slave devices connected to the I
Bit 0—Format Select (FS): Used together with the FSX bit in SARX and the SW bit in
DDCSWR to select the communication format.
The FS bit also specifies whether or not SAR slave address recognition is performed in slave
mode.
Bit
Initial value
Read/Write
I
Synchronous serial format: non-addressing format without acknowledge bit, for master mode
only
Formatless mode (channel 0 only): non-addressing format with or without acknowledge bit,
slave mode only, start/stop conditions not detected
2
C bus format: addressing format with acknowledge bit
Slave Address Register (SAR)
SVA6
R/W
7
0
SVA5
R/W
6
0
SVA4
R/W
5
0
Section 16 I
SVA3
R/W
4
0
Rev. 4.00 Jun 06, 2006 page 463 of 1004
2
C Bus Interface [H8S/2138 Group Option]
SVA2
R/W
3
0
SVA1
2
R/W
C bus.
2
0
SVA0
R/W
REJ09B0301-0400
1
0
R/W
FS
0
0

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