h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 741

• Manufacturer Part Number: h8s-2138
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Bits 2 to 0—System Clock Select (SCK2 to SCK0): These bits select the clock for the bus
master in high-speed mode and medium-speed mode. When operating the device after a transition
to subactive mode or watch mode, bits SCK2 to SCK0 should all be cleared to 0.
24.2.2
LPWRCR is an 8-bit readable/writable register that performs power-down mode control.
LPWRCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—Direct-Transfer On Flag (DTON): Specifies whether a direct transition is made between
high-speed mode, medium-speed mode, and subactive mode when making a power-down
transition by executing a SLEEP instruction. The operating mode to which the transition is made
after SLEEP instruction execution is determined by a combination of other control bits.
Bit 2
SCK2
0
1
Bit
Initial value
Read/Write
Low-Power Control Register (LPWRCR)
Bit 1
SCK1
0
1
0
1
DTON
R/W
Bit 0
SCK0
0
1
0
1
0
1
—
7
0
LSON
R/W
Description
Bus master is in high-speed mode
Medium-speed clock is /2
Medium-speed clock is /4
Medium-speed clock is /8
Medium-speed clock is /16
Medium-speed clock is /32
—
6
0
NESEL
R/W
5
0
EXCLE
R/W
4
0
Rev. 4.00 Jun 06, 2006 page 687 of 1004
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—
3
0
Section 24 Power-Down State
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—
2
0
REJ09B0301-0400
—
—
1
0
(Initial value)
—
—
0
0